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		e5ffa960d7
		
	
	
	
	
		
			
			The new PCI subsystem is initialized during runtime. PCI::Initializer is supposed to be called during early boot, to perform a few tests, and initialize the proper configuration space access mechanism. Kernel boot parameters can be specified by a user to determine what tests will occur, to aid debugging on problematic machines. After that, PCI::Initializer should be dismissed. PCI::IOAccess is a class that is derived from PCI::Access class and implements PCI configuration space access mechanism via x86 IO ports. PCI::MMIOAccess is a class that is derived from PCI::Access and implements PCI configurtaion space access mechanism via memory access. The new PCI subsystem also supports determination of IO/MMIO space needed by a device by checking a given BAR. In addition, Every device or component that use the PCI subsystem has changed to match the last changes.
		
			
				
	
	
		
			377 lines
		
	
	
	
		
			12 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			377 lines
		
	
	
	
		
			12 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| #include <Kernel/IO.h>
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| #include <Kernel/Net/E1000NetworkAdapter.h>
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| #include <Kernel/Thread.h>
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| 
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| #define REG_CTRL 0x0000
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| #define REG_STATUS 0x0008
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| #define REG_EEPROM 0x0014
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| #define REG_CTRL_EXT 0x0018
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| #define REG_IMASK 0x00D0
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| #define REG_RCTRL 0x0100
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| #define REG_RXDESCLO 0x2800
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| #define REG_RXDESCHI 0x2804
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| #define REG_RXDESCLEN 0x2808
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| #define REG_RXDESCHEAD 0x2810
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| #define REG_RXDESCTAIL 0x2818
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| #define REG_TCTRL 0x0400
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| #define REG_TXDESCLO 0x3800
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| #define REG_TXDESCHI 0x3804
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| #define REG_TXDESCLEN 0x3808
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| #define REG_TXDESCHEAD 0x3810
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| #define REG_TXDESCTAIL 0x3818
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| #define REG_RDTR 0x2820             // RX Delay Timer Register
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| #define REG_RXDCTL 0x3828           // RX Descriptor Control
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| #define REG_RADV 0x282C             // RX Int. Absolute Delay Timer
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| #define REG_RSRPD 0x2C00            // RX Small Packet Detect Interrupt
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| #define REG_TIPG 0x0410             // Transmit Inter Packet Gap
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| #define ECTRL_SLU 0x40              //set link up
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| #define RCTL_EN (1 << 1)            // Receiver Enable
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| #define RCTL_SBP (1 << 2)           // Store Bad Packets
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| #define RCTL_UPE (1 << 3)           // Unicast Promiscuous Enabled
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| #define RCTL_MPE (1 << 4)           // Multicast Promiscuous Enabled
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| #define RCTL_LPE (1 << 5)           // Long Packet Reception Enable
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| #define RCTL_LBM_NONE (0 << 6)      // No Loopback
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| #define RCTL_LBM_PHY (3 << 6)       // PHY or external SerDesc loopback
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| #define RTCL_RDMTS_HALF (0 << 8)    // Free Buffer Threshold is 1/2 of RDLEN
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| #define RTCL_RDMTS_QUARTER (1 << 8) // Free Buffer Threshold is 1/4 of RDLEN
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| #define RTCL_RDMTS_EIGHTH (2 << 8)  // Free Buffer Threshold is 1/8 of RDLEN
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| #define RCTL_MO_36 (0 << 12)        // Multicast Offset - bits 47:36
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| #define RCTL_MO_35 (1 << 12)        // Multicast Offset - bits 46:35
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| #define RCTL_MO_34 (2 << 12)        // Multicast Offset - bits 45:34
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| #define RCTL_MO_32 (3 << 12)        // Multicast Offset - bits 43:32
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| #define RCTL_BAM (1 << 15)          // Broadcast Accept Mode
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| #define RCTL_VFE (1 << 18)          // VLAN Filter Enable
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| #define RCTL_CFIEN (1 << 19)        // Canonical Form Indicator Enable
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| #define RCTL_CFI (1 << 20)          // Canonical Form Indicator Bit Value
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| #define RCTL_DPF (1 << 22)          // Discard Pause Frames
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| #define RCTL_PMCF (1 << 23)         // Pass MAC Control Frames
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| #define RCTL_SECRC (1 << 26)        // Strip Ethernet CRC
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| 
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| // Buffer Sizes
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| #define RCTL_BSIZE_256 (3 << 16)
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| #define RCTL_BSIZE_512 (2 << 16)
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| #define RCTL_BSIZE_1024 (1 << 16)
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| #define RCTL_BSIZE_2048 (0 << 16)
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| #define RCTL_BSIZE_4096 ((3 << 16) | (1 << 25))
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| #define RCTL_BSIZE_8192 ((2 << 16) | (1 << 25))
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| #define RCTL_BSIZE_16384 ((1 << 16) | (1 << 25))
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| 
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| // Transmit Command
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| 
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| #define CMD_EOP (1 << 0)  // End of Packet
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| #define CMD_IFCS (1 << 1) // Insert FCS
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| #define CMD_IC (1 << 2)   // Insert Checksum
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| #define CMD_RS (1 << 3)   // Report Status
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| #define CMD_RPS (1 << 4)  // Report Packet Sent
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| #define CMD_VLE (1 << 6)  // VLAN Packet Enable
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| #define CMD_IDE (1 << 7)  // Interrupt Delay Enable
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| 
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| // TCTL Register
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| 
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| #define TCTL_EN (1 << 1)      // Transmit Enable
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| #define TCTL_PSP (1 << 3)     // Pad Short Packets
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| #define TCTL_CT_SHIFT 4       // Collision Threshold
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| #define TCTL_COLD_SHIFT 12    // Collision Distance
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| #define TCTL_SWXOFF (1 << 22) // Software XOFF Transmission
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| #define TCTL_RTLC (1 << 24)   // Re-transmit on Late Collision
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| 
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| #define TSTA_DD (1 << 0) // Descriptor Done
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| #define TSTA_EC (1 << 1) // Excess Collisions
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| #define TSTA_LC (1 << 2) // Late Collision
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| #define LSTA_TU (1 << 3) // Transmit Underrun
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| 
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| // STATUS Register
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| 
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| #define STATUS_FD 0x01
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| #define STATUS_LU 0x02
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| #define STATUS_TXOFF 0x08
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| #define STATUS_SPEED 0xC0
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| #define STATUS_SPEED_10MB 0x00
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| #define STATUS_SPEED_100MB 0x40
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| #define STATUS_SPEED_1000MB1 0x80
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| #define STATUS_SPEED_1000MB2 0xC0
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| 
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| OwnPtr<E1000NetworkAdapter> E1000NetworkAdapter::autodetect()
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| {
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|     static const PCI::ID qemu_bochs_vbox_id = { 0x8086, 0x100e };
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|     PCI::Address found_address;
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|     PCI::enumerate_all([&](const PCI::Address& address, PCI::ID id) {
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|         if (id == qemu_bochs_vbox_id) {
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|             found_address = address;
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|             return;
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|         }
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|     });
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|     if (found_address.is_null())
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|         return nullptr;
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|     u8 irq = PCI::get_interrupt_line(found_address);
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|     return make<E1000NetworkAdapter>(found_address, irq);
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| }
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| 
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| E1000NetworkAdapter::E1000NetworkAdapter(PCI::Address pci_address, u8 irq)
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|     : IRQHandler(irq)
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|     , m_pci_address(pci_address)
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| {
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|     set_interface_name("e1k");
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| 
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|     kprintf("E1000: Found at PCI address %b:%b:%b\n", pci_address.bus(), pci_address.slot(), pci_address.function());
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| 
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|     enable_bus_mastering(m_pci_address);
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| 
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|     m_mmio_base = PhysicalAddress(PCI::get_BAR0(m_pci_address));
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|     u32 mmio_base_size = PCI::get_BAR_Space_Size(pci_address, 0);
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|     MM.map_for_kernel(VirtualAddress(m_mmio_base.get()), m_mmio_base);
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|     MM.map_for_kernel(VirtualAddress(m_mmio_base.offset(4096).get()), m_mmio_base.offset(4096));
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|     MM.map_for_kernel(VirtualAddress(m_mmio_base.offset(8192).get()), m_mmio_base.offset(8192));
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|     MM.map_for_kernel(VirtualAddress(m_mmio_base.offset(12288).get()), m_mmio_base.offset(12288));
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|     MM.map_for_kernel(VirtualAddress(m_mmio_base.offset(16384).get()), m_mmio_base.offset(16384));
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|     m_use_mmio = true;
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|     m_io_base = PCI::get_BAR1(m_pci_address) & ~1;
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|     m_interrupt_line = PCI::get_interrupt_line(m_pci_address);
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|     kprintf("E1000: IO port base: %w\n", m_io_base);
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|     kprintf("E1000: MMIO base: P%x\n", m_mmio_base);
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|     kprintf("E1000: MMIO base size: %u bytes\n", mmio_base_size);
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|     kprintf("E1000: Interrupt line: %u\n", m_interrupt_line);
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|     detect_eeprom();
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|     kprintf("E1000: Has EEPROM? %u\n", m_has_eeprom);
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|     read_mac_address();
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|     const auto& mac = mac_address();
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|     kprintf("E1000: MAC address: %b:%b:%b:%b:%b:%b\n", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
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| 
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|     u32 flags = in32(REG_CTRL);
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|     out32(REG_CTRL, flags | ECTRL_SLU);
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| 
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|     initialize_rx_descriptors();
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|     initialize_tx_descriptors();
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| 
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|     out32(REG_IMASK, 0x1f6dc);
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|     out32(REG_IMASK, 0xff & ~4);
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|     in32(0xc0);
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| 
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|     enable_irq();
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| }
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| 
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| E1000NetworkAdapter::~E1000NetworkAdapter()
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| {
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| }
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| 
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| void E1000NetworkAdapter::handle_irq()
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| {
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|     out32(REG_IMASK, 0x1);
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| 
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|     u32 status = in32(0xc0);
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|     if (status & 4) {
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|         u32 flags = in32(REG_CTRL);
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|         out32(REG_CTRL, flags | ECTRL_SLU);
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|     }
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|     if (status & 0x10) {
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|         // Threshold OK?
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|     }
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|     if (status & 0x80) {
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|         receive();
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|     }
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| 
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|     m_wait_queue.wake_all();
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| }
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| 
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| void E1000NetworkAdapter::detect_eeprom()
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| {
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|     out32(REG_EEPROM, 0x1);
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|     for (volatile int i = 0; i < 999; ++i) {
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|         u32 data = in32(REG_EEPROM);
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|         if (data & 0x10) {
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|             m_has_eeprom = true;
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|             return;
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|         }
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|     }
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|     m_has_eeprom = false;
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| }
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| 
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| u32 E1000NetworkAdapter::read_eeprom(u8 address)
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| {
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|     u16 data = 0;
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|     u32 tmp = 0;
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|     if (m_has_eeprom) {
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|         out32(REG_EEPROM, ((u32)address << 8) | 1);
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|         while (!((tmp = in32(REG_EEPROM)) & (1 << 4)))
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|             ;
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|     } else {
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|         out32(REG_EEPROM, ((u32)address << 2) | 1);
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|         while (!((tmp = in32(REG_EEPROM)) & (1 << 1)))
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|             ;
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|     }
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|     data = (tmp >> 16) & 0xffff;
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|     return data;
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| }
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| 
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| void E1000NetworkAdapter::read_mac_address()
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| {
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|     if (m_has_eeprom) {
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|         u8 mac[6];
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|         u32 tmp = read_eeprom(0);
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|         mac[0] = tmp & 0xff;
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|         mac[1] = tmp >> 8;
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|         tmp = read_eeprom(1);
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|         mac[2] = tmp & 0xff;
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|         mac[3] = tmp >> 8;
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|         tmp = read_eeprom(2);
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|         mac[4] = tmp & 0xff;
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|         mac[5] = tmp >> 8;
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|         set_mac_address(mac);
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|     } else {
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|         ASSERT_NOT_REACHED();
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|     }
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| }
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| 
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| bool E1000NetworkAdapter::link_up()
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| {
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|     return (in32(REG_STATUS) & STATUS_LU);
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| }
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| 
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| void E1000NetworkAdapter::initialize_rx_descriptors()
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| {
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|     auto ptr = (u32)kmalloc_eternal(sizeof(e1000_rx_desc) * number_of_rx_descriptors + 16);
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|     // Make sure it's 16-byte aligned.
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|     if (ptr % 16)
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|         ptr = (ptr + 16) - (ptr % 16);
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|     m_rx_descriptors = (e1000_rx_desc*)ptr;
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|     for (int i = 0; i < number_of_rx_descriptors; ++i) {
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|         auto& descriptor = m_rx_descriptors[i];
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|         descriptor.addr = (u64)kmalloc_eternal(8192 + 16);
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|         descriptor.status = 0;
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|     }
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| 
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|     out32(REG_RXDESCLO, ptr);
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|     out32(REG_RXDESCHI, 0);
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|     out32(REG_RXDESCLEN, number_of_rx_descriptors * sizeof(e1000_rx_desc));
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|     out32(REG_RXDESCHEAD, 0);
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|     out32(REG_RXDESCTAIL, number_of_rx_descriptors - 1);
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| 
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|     out32(REG_RCTRL, RCTL_EN | RCTL_SBP | RCTL_UPE | RCTL_MPE | RCTL_LBM_NONE | RTCL_RDMTS_HALF | RCTL_BAM | RCTL_SECRC | RCTL_BSIZE_8192);
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| }
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| 
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| void E1000NetworkAdapter::initialize_tx_descriptors()
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| {
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|     auto ptr = (u32)kmalloc_eternal(sizeof(e1000_tx_desc) * number_of_tx_descriptors + 16);
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|     // Make sure it's 16-byte aligned.
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|     if (ptr % 16)
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|         ptr = (ptr + 16) - (ptr % 16);
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|     m_tx_descriptors = (e1000_tx_desc*)ptr;
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|     for (int i = 0; i < number_of_tx_descriptors; ++i) {
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|         auto& descriptor = m_tx_descriptors[i];
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|         descriptor.addr = (u64)kmalloc_eternal(8192 + 16);
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|         descriptor.cmd = 0;
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|     }
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| 
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|     out32(REG_TXDESCLO, ptr);
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|     out32(REG_TXDESCHI, 0);
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|     out32(REG_TXDESCLEN, number_of_tx_descriptors * sizeof(e1000_tx_desc));
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|     out32(REG_TXDESCHEAD, 0);
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|     out32(REG_TXDESCTAIL, 0);
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| 
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|     out32(REG_TCTRL, in32(REG_TCTRL) | TCTL_EN | TCTL_PSP);
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|     out32(REG_TIPG, 0x0060200A);
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| }
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| 
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| void E1000NetworkAdapter::out8(u16 address, u8 data)
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| {
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|     if (m_use_mmio) {
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|         auto* ptr = (volatile u8*)(m_mmio_base.get() + address);
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|         *ptr = data;
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|         return;
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|     }
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|     IO::out8(m_io_base + address, data);
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| }
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| 
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| void E1000NetworkAdapter::out16(u16 address, u16 data)
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| {
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|     if (m_use_mmio) {
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|         auto* ptr = (volatile u16*)(m_mmio_base.get() + address);
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|         *ptr = data;
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|         return;
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|     }
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|     IO::out16(m_io_base + address, data);
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| }
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| 
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| void E1000NetworkAdapter::out32(u16 address, u32 data)
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| {
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|     if (m_use_mmio) {
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|         auto* ptr = (volatile u32*)(m_mmio_base.get() + address);
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|         *ptr = data;
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|         return;
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|     }
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|     IO::out32(m_io_base + address, data);
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| }
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| 
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| u8 E1000NetworkAdapter::in8(u16 address)
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| {
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|     if (m_use_mmio)
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|         return *(volatile u8*)(m_mmio_base.get() + address);
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|     return IO::in8(m_io_base + address);
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| }
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| 
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| u16 E1000NetworkAdapter::in16(u16 address)
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| {
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|     if (m_use_mmio)
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|         return *(volatile u16*)(m_mmio_base.get() + address);
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|     return IO::in16(m_io_base + address);
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| }
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| 
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| u32 E1000NetworkAdapter::in32(u16 address)
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| {
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|     if (m_use_mmio)
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|         return *(volatile u32*)(m_mmio_base.get() + address);
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|     return IO::in32(m_io_base + address);
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| }
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| 
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| void E1000NetworkAdapter::send_raw(const u8* data, int length)
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| {
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|     disable_irq();
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|     u32 tx_current = in32(REG_TXDESCTAIL);
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| #ifdef E1000_DEBUG
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|     kprintf("E1000: Sending packet (%d bytes)\n", length);
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| #endif
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|     auto& descriptor = m_tx_descriptors[tx_current];
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|     ASSERT(length <= 8192);
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|     memcpy((void*)descriptor.addr, data, length);
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|     descriptor.length = length;
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|     descriptor.status = 0;
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|     descriptor.cmd = CMD_EOP | CMD_IFCS | CMD_RS;
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| #ifdef E1000_DEBUG
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|     kprintf("E1000: Using tx descriptor %d (head is at %d)\n", tx_current, in32(REG_TXDESCHEAD));
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| #endif
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|     tx_current = (tx_current + 1) % number_of_tx_descriptors;
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|     out32(REG_TXDESCTAIL, tx_current);
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|     cli();
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|     enable_irq();
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|     for (;;) {
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|         if (descriptor.status) {
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|             sti();
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|             break;
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|         }
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|         current->wait_on(m_wait_queue);
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|     }
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| #ifdef E1000_DEBUG
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|     kprintf("E1000: Sent packet, status is now %b!\n", descriptor.status);
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| #endif
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| }
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| 
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| void E1000NetworkAdapter::receive()
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| {
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|     u32 rx_current;
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|     for (;;) {
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|         rx_current = in32(REG_RXDESCTAIL);
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|         if (rx_current == in32(REG_RXDESCHEAD))
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|             return;
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|         rx_current = (rx_current + 1) % number_of_rx_descriptors;
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|         if (!(m_rx_descriptors[rx_current].status & 1))
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|             break;
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|         auto* buffer = (u8*)m_rx_descriptors[rx_current].addr;
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|         u16 length = m_rx_descriptors[rx_current].length;
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| #ifdef E1000_DEBUG
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|         kprintf("E1000: Received 1 packet @ %p (%u) bytes!\n", buffer, length);
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| #endif
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|         did_receive(buffer, length);
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|         m_rx_descriptors[rx_current].status = 0;
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|         out32(REG_RXDESCTAIL, rx_current);
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|     }
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| }
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