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https://github.com/RGBCube/serenity
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9ee098b119
Like the HID, Audio and Storage subsystem, the Graphics subsystem (which
handles GPUs technically) exposes unix device files (typically in /dev).
To ensure consistency across the repository, move all related files to a
new directory under Kernel/Devices called "GPU".
Also remove the redundant "GPU" word from the VirtIO driver directory,
and the word "Graphics" from GraphicsManagement.{h,cpp} filenames.
97 lines
3.6 KiB
C++
97 lines
3.6 KiB
C++
/*
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* Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/RefPtr.h>
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#include <AK/Try.h>
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#include <Kernel/Devices/GPU/Console/GenericFramebufferConsole.h>
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#include <Kernel/Devices/GPU/Intel/Auxiliary/GMBusConnector.h>
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#include <Kernel/Devices/GPU/Intel/Definitions.h>
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#include <Kernel/Devices/GPU/Intel/NativeDisplayConnector.h>
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#include <Kernel/Devices/GPU/Intel/Plane/DisplayPlane.h>
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#include <Kernel/Devices/GPU/Intel/Transcoder/DisplayTranscoder.h>
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#include <Kernel/Library/LockRefPtr.h>
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#include <Kernel/Memory/TypedMapping.h>
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#include <LibEDID/EDID.h>
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namespace Kernel {
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class IntelNativeGraphicsAdapter;
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class IntelDisplayConnectorGroup : public RefCounted<IntelDisplayConnectorGroup> {
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friend class IntelNativeGraphicsAdapter;
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public:
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struct MMIORegion {
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enum class BARAssigned {
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BAR0,
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BAR2,
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};
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BARAssigned pci_bar_assigned;
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PhysicalAddress pci_bar_paddr;
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size_t pci_bar_space_length;
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};
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private:
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AK_TYPEDEF_DISTINCT_ORDERED_ID(size_t, RegisterOffset);
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enum class AnalogOutputRegisterOffset {
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AnalogDisplayPort = 0x61100,
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VGADisplayPlaneControl = 0x71400,
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};
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public:
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static ErrorOr<NonnullLockRefPtr<IntelDisplayConnectorGroup>> try_create(Badge<IntelNativeGraphicsAdapter>, IntelGraphics::Generation, MMIORegion const&, MMIORegion const&);
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ErrorOr<void> set_safe_mode_setting(Badge<IntelNativeDisplayConnector>, IntelNativeDisplayConnector&);
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ErrorOr<void> set_mode_setting(Badge<IntelNativeDisplayConnector>, IntelNativeDisplayConnector&, DisplayConnector::ModeSetting const&);
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private:
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IntelDisplayConnectorGroup(IntelGraphics::Generation generation, NonnullOwnPtr<GMBusConnector>, NonnullOwnPtr<Memory::Region> registers_region, MMIORegion const&, MMIORegion const&);
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ErrorOr<void> set_mode_setting(IntelNativeDisplayConnector&, DisplayConnector::ModeSetting const&);
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StringView convert_analog_output_register_to_string(AnalogOutputRegisterOffset index) const;
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void write_to_analog_output_register(AnalogOutputRegisterOffset, u32 value);
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u32 read_from_analog_output_register(AnalogOutputRegisterOffset) const;
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void write_to_general_register(RegisterOffset offset, u32 value);
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u32 read_from_general_register(RegisterOffset offset) const;
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// DisplayConnector initialization related methods
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ErrorOr<void> initialize_connectors();
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ErrorOr<void> initialize_gen4_connectors();
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// General Modesetting methods
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ErrorOr<void> set_gen4_mode_setting(IntelNativeDisplayConnector&, DisplayConnector::ModeSetting const&);
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bool set_crt_resolution(DisplayConnector::ModeSetting const&);
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void disable_vga_emulation();
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void enable_vga_plane();
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void disable_dac_output();
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void enable_dac_output();
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Spinlock<LockRank::None> m_control_lock;
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Spinlock<LockRank::None> m_modeset_lock;
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mutable Spinlock<LockRank::None> m_registers_lock;
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// Note: The linux driver specifies an enum of possible ports and there is only
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// 9 ports (PORT_{A-I}). PORT_TC{1-6} are mapped to PORT_{D-I}.
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Array<LockRefPtr<IntelNativeDisplayConnector>, 9> m_connectors;
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Array<OwnPtr<IntelDisplayTranscoder>, 5> m_transcoders;
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Array<OwnPtr<IntelDisplayPlane>, 3> m_planes;
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const MMIORegion m_mmio_first_region;
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const MMIORegion m_mmio_second_region;
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MMIORegion const& m_assigned_mmio_registers_region;
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const IntelGraphics::Generation m_generation;
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NonnullOwnPtr<Memory::Region> m_registers_region;
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NonnullOwnPtr<GMBusConnector> m_gmbus_connector;
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};
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}
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