mirror of
https://github.com/RGBCube/serenity
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59e122f8ba
The previous implementation of the PIIX3/4 PATA/IDE channel driver only supported a single drive, as the object model was wrong (the channel inherits the IRQ, not the disk drive itself). This fixes it by 'attaching' two `PATADiskDevices` to a `PATAChannel`, which makes more sense. The reading/writing code is presented as is, which violates the spec outlined by Seagate in the linked datasheet. That spec is rather old, so it might not be 100% up to date, though may cause issues on real hardware, so until we can actually test it, this will suffice.
72 lines
2 KiB
C++
72 lines
2 KiB
C++
//
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// Parallel ATA (PATA) controller driver
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//
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// This driver describes a logical PATA Channel. Each channel can connect up to 2
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// IDE Hard Disk Drives. The drives themselves can be either the master drive (hd0)
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// or the slave drive (hd1).
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//
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// More information about the ATA spec for PATA can be found here:
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// ftp://ftp.seagate.com/acrobat/reference/111-1c.pdf
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//
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#pragma once
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#include <AK/OwnPtr.h>
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#include <AK/RefPtr.h>
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#include <Kernel/IRQHandler.h>
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#include <Kernel/Lock.h>
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#include <Kernel/PCI.h>
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#include <Kernel/VM/PhysicalAddress.h>
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#include <Kernel/VM/PhysicalPage.h>
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struct PhysicalRegionDescriptor {
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PhysicalAddress offset;
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u16 size { 0 };
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u16 end_of_table { 0 };
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};
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class PATADiskDevice;
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class PATAChannel final : public IRQHandler {
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friend class PATADiskDevice;
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AK_MAKE_ETERNAL
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public:
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enum class ChannelType : u8 {
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Primary,
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Secondary
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};
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public:
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static OwnPtr<PATAChannel> create(ChannelType type);
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explicit PATAChannel(ChannelType);
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virtual ~PATAChannel() override;
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RefPtr<PATADiskDevice> master_device() { return m_master; };
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RefPtr<PATADiskDevice> slave_device() { return m_slave; };
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private:
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//^ IRQHandler
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virtual void handle_irq() override;
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void initialize();
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void detect_disks();
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bool wait_for_irq();
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bool ata_read_sectors_with_dma(u32, u16, u8*, bool);
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bool ata_write_sectors_with_dma(u32, u16, const u8*, bool);
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bool ata_read_sectors(u32, u16, u8*, bool);
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bool ata_write_sectors(u32, u16, const u8*, bool);
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// Data members
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u8 m_channel_number { 0 }; // Channel number. 0 = master, 1 = slave
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u16 m_io_base { 0x1F0 };
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volatile u8 m_device_error { 0 };
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volatile bool m_interrupted { false };
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PCI::Address m_pci_address;
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PhysicalRegionDescriptor m_prdt;
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RefPtr<PhysicalPage> m_dma_buffer_page;
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u16 m_bus_master_base { 0 };
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Lockable<bool> m_dma_enabled;
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RefPtr<PATADiskDevice> m_master;
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RefPtr<PATADiskDevice> m_slave;
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};
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