mirror of
https://github.com/RGBCube/serenity
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e606ff3751
According to the VirtIO 1.0 specification: "Non-transitional devices SHOULD have a PCI Device ID in the range 0x1040 to 0x107f. Non-transitional devices SHOULD have a PCI Revision ID of 1 or higher. Non-transitional devices SHOULD have a PCI Subsystem Device ID of 0x40 or higher." It also says that: "Transitional devices MUST have a PCI Revision ID of 0. Transitional devices MUST have the PCI Subsystem Device ID matching the Virtio Device ID, as indicated in section 5. Transitional devices MUST have the Transitional PCI Device ID in the range 0x1000 to 0x103f." So, for legacy devices, we know that revision ID in the PCI header won't be 1, so we probe for PCI_SUBSYSTEM_ID value. Instead of using the subsystem device ID, we can probe the DEVICE_ID value directly in case it's not a legacy device. This should cover all possibilities for identifying VirtIO devices, both per the specification of 0.9.5, and future revisions from 1.0 onwards.
428 lines
15 KiB
C++
428 lines
15 KiB
C++
/*
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* Copyright (c) 2021, the SerenityOS developers.
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Bus/PCI/IDs.h>
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#include <Kernel/Bus/VirtIO/Console.h>
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#include <Kernel/Bus/VirtIO/Device.h>
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#include <Kernel/Bus/VirtIO/RNG.h>
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#include <Kernel/CommandLine.h>
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#include <Kernel/Sections.h>
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namespace Kernel::VirtIO {
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UNMAP_AFTER_INIT void detect()
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{
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if (kernel_command_line().disable_virtio())
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return;
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PCI::enumerate([&](const PCI::Address& address, PCI::ID id) {
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if (address.is_null() || id.is_null())
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return;
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// TODO: We should also be checking that the device_id is in between 0x1000 - 0x107F inclusive
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if (id.vendor_id != PCI::VendorID::VirtIO)
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return;
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switch (id.device_id) {
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case PCI::DeviceID::VirtIOConsole: {
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auto& console = Console::must_create(address).leak_ref();
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console.initialize();
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break;
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}
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case PCI::DeviceID::VirtIOEntropy: {
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auto& rng = RNG::must_create(address).leak_ref();
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rng.initialize();
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break;
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}
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case PCI::DeviceID::VirtIOGPU: {
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// This should have been initialized by the graphics subsystem
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break;
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}
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default:
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dbgln_if(VIRTIO_DEBUG, "VirtIO: Unknown VirtIO device with ID: {}", id.device_id);
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break;
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}
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});
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}
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StringView determine_device_class(const PCI::Address& address)
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{
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if (PCI::get_revision_id(address) == 0) {
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// Note: If the device is a legacy (or transitional) device, therefore,
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// probe the subsystem ID in the PCI header and figure out the
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auto subsystem_device_id = PCI::get_subsystem_id(address);
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switch (subsystem_device_id) {
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case 1:
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return "VirtIONetAdapter";
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case 2:
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return "VirtIOBlockDevice";
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case 3:
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return "VirtIOConsole";
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case 4:
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return "VirtIORNG";
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}
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dbgln("VirtIO: Unknown subsystem_device_id {}", subsystem_device_id);
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VERIFY_NOT_REACHED();
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}
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auto id = PCI::get_id(address);
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VERIFY(id.vendor_id == PCI::VendorID::VirtIO);
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switch (id.device_id) {
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case PCI::DeviceID::VirtIONetAdapter:
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return "VirtIONetAdapter";
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case PCI::DeviceID::VirtIOBlockDevice:
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return "VirtIOBlockDevice";
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case PCI::DeviceID::VirtIOConsole:
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return "VirtIOConsole";
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case PCI::DeviceID::VirtIOEntropy:
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return "VirtIORNG";
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case PCI::DeviceID::VirtIOGPU:
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return "VirtIOGPU";
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}
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dbgln("VirtIO: Unknown device_id {}", id.vendor_id);
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VERIFY_NOT_REACHED();
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}
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UNMAP_AFTER_INIT void Device::initialize()
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{
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auto address = pci_address();
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enable_bus_mastering(pci_address());
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PCI::enable_interrupt_line(pci_address());
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enable_irq();
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auto capabilities = PCI::get_physical_id(address).capabilities();
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for (auto& capability : capabilities) {
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if (capability.id() == PCI_CAPABILITY_VENDOR_SPECIFIC) {
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// We have a virtio_pci_cap
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auto cfg = make<Configuration>();
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auto raw_config_type = capability.read8(0x3);
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if (raw_config_type < static_cast<u8>(ConfigurationType::Common) || raw_config_type > static_cast<u8>(ConfigurationType::PCI)) {
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dbgln("{}: Unknown capability configuration type: {}", VirtIO::determine_device_class(address), raw_config_type);
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return;
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}
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cfg->cfg_type = static_cast<ConfigurationType>(raw_config_type);
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auto cap_length = capability.read8(0x2);
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if (cap_length < 0x10) {
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dbgln("{}: Unexpected capability size: {}", VirtIO::determine_device_class(address), cap_length);
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break;
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}
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cfg->bar = capability.read8(0x4);
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if (cfg->bar > 0x5) {
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dbgln("{}: Unexpected capability bar value: {}", VirtIO::determine_device_class(address), cfg->bar);
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break;
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}
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cfg->offset = capability.read32(0x8);
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cfg->length = capability.read32(0xc);
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dbgln_if(VIRTIO_DEBUG, "{}: Found configuration {}, bar: {}, offset: {}, length: {}", VirtIO::determine_device_class(address), (u32)cfg->cfg_type, cfg->bar, cfg->offset, cfg->length);
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if (cfg->cfg_type == ConfigurationType::Common)
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m_use_mmio = true;
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else if (cfg->cfg_type == ConfigurationType::Notify)
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m_notify_multiplier = capability.read32(0x10);
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m_configs.append(move(cfg));
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}
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}
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if (m_use_mmio) {
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m_common_cfg = get_config(ConfigurationType::Common, 0);
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m_notify_cfg = get_config(ConfigurationType::Notify, 0);
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m_isr_cfg = get_config(ConfigurationType::ISR, 0);
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}
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reset_device();
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set_status_bit(DEVICE_STATUS_ACKNOWLEDGE);
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set_status_bit(DEVICE_STATUS_DRIVER);
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}
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UNMAP_AFTER_INIT VirtIO::Device::Device(PCI::Address address)
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: PCI::Device(address)
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, IRQHandler(PCI::get_interrupt_line(address))
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, m_io_base(IOAddress(PCI::get_BAR0(pci_address()) & ~1))
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{
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dbgln("{}: Found @ {}", VirtIO::determine_device_class(address), pci_address());
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}
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auto Device::mapping_for_bar(u8 bar) -> MappedMMIO&
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{
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VERIFY(m_use_mmio);
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auto& mapping = m_mmio[bar];
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if (!mapping.base) {
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mapping.size = PCI::get_BAR_space_size(pci_address(), bar);
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mapping.base = MM.allocate_kernel_region(PhysicalAddress(page_base_of(PCI::get_BAR(pci_address(), bar))), Memory::page_round_up(mapping.size), "VirtIO MMIO", Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No);
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if (!mapping.base)
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dbgln("{}: Failed to map bar {}", VirtIO::determine_device_class(pci_address()), bar);
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}
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return mapping;
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}
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void Device::notify_queue(u16 queue_index)
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{
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dbgln_if(VIRTIO_DEBUG, "{}: notifying about queue change at idx: {}", VirtIO::determine_device_class(pci_address()), queue_index);
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if (!m_notify_cfg)
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out<u16>(REG_QUEUE_NOTIFY, queue_index);
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else
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config_write16(*m_notify_cfg, get_queue(queue_index).notify_offset() * m_notify_multiplier, queue_index);
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}
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u8 Device::config_read8(const Configuration& config, u32 offset)
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{
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return mapping_for_bar(config.bar).read<u8>(config.offset + offset);
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}
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u16 Device::config_read16(const Configuration& config, u32 offset)
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{
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return mapping_for_bar(config.bar).read<u16>(config.offset + offset);
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}
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u32 Device::config_read32(const Configuration& config, u32 offset)
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{
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return mapping_for_bar(config.bar).read<u32>(config.offset + offset);
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}
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void Device::config_write8(const Configuration& config, u32 offset, u8 value)
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{
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mapping_for_bar(config.bar).write(config.offset + offset, value);
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}
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void Device::config_write16(const Configuration& config, u32 offset, u16 value)
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{
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mapping_for_bar(config.bar).write(config.offset + offset, value);
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}
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void Device::config_write32(const Configuration& config, u32 offset, u32 value)
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{
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mapping_for_bar(config.bar).write(config.offset + offset, value);
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}
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void Device::config_write64(const Configuration& config, u32 offset, u64 value)
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{
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mapping_for_bar(config.bar).write(config.offset + offset, value);
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}
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u8 Device::read_status_bits()
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{
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if (!m_common_cfg)
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return in<u8>(REG_DEVICE_STATUS);
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return config_read8(*m_common_cfg, COMMON_CFG_DEVICE_STATUS);
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}
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void Device::mask_status_bits(u8 status_mask)
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{
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m_status &= status_mask;
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if (!m_common_cfg)
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out<u8>(REG_DEVICE_STATUS, m_status);
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else
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config_write8(*m_common_cfg, COMMON_CFG_DEVICE_STATUS, m_status);
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}
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void Device::set_status_bit(u8 status_bit)
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{
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m_status |= status_bit;
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if (!m_common_cfg)
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out<u8>(REG_DEVICE_STATUS, m_status);
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else
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config_write8(*m_common_cfg, COMMON_CFG_DEVICE_STATUS, m_status);
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}
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u64 Device::get_device_features()
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{
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if (!m_common_cfg)
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return in<u32>(REG_DEVICE_FEATURES);
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config_write32(*m_common_cfg, COMMON_CFG_DEVICE_FEATURE_SELECT, 0);
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auto lower_bits = config_read32(*m_common_cfg, COMMON_CFG_DEVICE_FEATURE);
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config_write32(*m_common_cfg, COMMON_CFG_DEVICE_FEATURE_SELECT, 1);
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u64 upper_bits = (u64)config_read32(*m_common_cfg, COMMON_CFG_DEVICE_FEATURE) << 32;
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return upper_bits | lower_bits;
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}
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bool Device::accept_device_features(u64 device_features, u64 accepted_features)
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{
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VERIFY(!m_did_accept_features);
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m_did_accept_features = true;
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if (is_feature_set(device_features, VIRTIO_F_VERSION_1)) {
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accepted_features |= VIRTIO_F_VERSION_1; // let the device know were not a legacy driver
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}
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if (is_feature_set(device_features, VIRTIO_F_RING_PACKED)) {
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dbgln_if(VIRTIO_DEBUG, "{}: packed queues not yet supported", VirtIO::determine_device_class(pci_address()));
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accepted_features &= ~(VIRTIO_F_RING_PACKED);
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}
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// TODO: implement indirect descriptors to allow queue_size buffers instead of buffers totalling (PAGE_SIZE * queue_size) bytes
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if (is_feature_set(device_features, VIRTIO_F_INDIRECT_DESC)) {
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// accepted_features |= VIRTIO_F_INDIRECT_DESC;
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}
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if (is_feature_set(device_features, VIRTIO_F_IN_ORDER)) {
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accepted_features |= VIRTIO_F_IN_ORDER;
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}
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dbgln_if(VIRTIO_DEBUG, "{}: Device features: {}", VirtIO::determine_device_class(pci_address()), device_features);
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dbgln_if(VIRTIO_DEBUG, "{}: Accepted features: {}", VirtIO::determine_device_class(pci_address()), accepted_features);
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if (!m_common_cfg) {
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out<u32>(REG_GUEST_FEATURES, accepted_features);
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} else {
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config_write32(*m_common_cfg, COMMON_CFG_DRIVER_FEATURE_SELECT, 0);
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config_write32(*m_common_cfg, COMMON_CFG_DRIVER_FEATURE, accepted_features);
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config_write32(*m_common_cfg, COMMON_CFG_DRIVER_FEATURE_SELECT, 1);
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config_write32(*m_common_cfg, COMMON_CFG_DRIVER_FEATURE, accepted_features >> 32);
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}
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set_status_bit(DEVICE_STATUS_FEATURES_OK);
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m_status = read_status_bits();
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if (!(m_status & DEVICE_STATUS_FEATURES_OK)) {
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set_status_bit(DEVICE_STATUS_FAILED);
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dbgln("{}: Features not accepted by host!", VirtIO::determine_device_class(pci_address()));
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return false;
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}
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m_accepted_features = accepted_features;
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dbgln_if(VIRTIO_DEBUG, "{}: Features accepted by host", VirtIO::determine_device_class(pci_address()));
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return true;
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}
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void Device::reset_device()
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{
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dbgln_if(VIRTIO_DEBUG, "{}: Reset device", VirtIO::determine_device_class(pci_address()));
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if (!m_common_cfg) {
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mask_status_bits(0);
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while (read_status_bits() != 0) {
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// TODO: delay a bit?
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}
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return;
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}
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config_write8(*m_common_cfg, COMMON_CFG_DEVICE_STATUS, 0);
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while (config_read8(*m_common_cfg, COMMON_CFG_DEVICE_STATUS) != 0) {
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// TODO: delay a bit?
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}
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}
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bool Device::setup_queue(u16 queue_index)
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{
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if (!m_common_cfg)
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return false;
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config_write16(*m_common_cfg, COMMON_CFG_QUEUE_SELECT, queue_index);
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u16 queue_size = config_read16(*m_common_cfg, COMMON_CFG_QUEUE_SIZE);
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if (queue_size == 0) {
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dbgln_if(VIRTIO_DEBUG, "{}: Queue[{}] is unavailable!", VirtIO::determine_device_class(pci_address()), queue_index);
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return true;
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}
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u16 queue_notify_offset = config_read16(*m_common_cfg, COMMON_CFG_QUEUE_NOTIFY_OFF);
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auto queue = make<Queue>(queue_size, queue_notify_offset);
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if (queue->is_null())
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return false;
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config_write64(*m_common_cfg, COMMON_CFG_QUEUE_DESC, queue->descriptor_area().get());
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config_write64(*m_common_cfg, COMMON_CFG_QUEUE_DRIVER, queue->driver_area().get());
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config_write64(*m_common_cfg, COMMON_CFG_QUEUE_DEVICE, queue->device_area().get());
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dbgln_if(VIRTIO_DEBUG, "{}: Queue[{}] configured with size: {}", VirtIO::determine_device_class(pci_address()), queue_index, queue_size);
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m_queues.append(move(queue));
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return true;
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}
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bool Device::activate_queue(u16 queue_index)
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{
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if (!m_common_cfg)
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return false;
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config_write16(*m_common_cfg, COMMON_CFG_QUEUE_SELECT, queue_index);
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config_write16(*m_common_cfg, COMMON_CFG_QUEUE_ENABLE, true);
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dbgln_if(VIRTIO_DEBUG, "{}: Queue[{}] activated", VirtIO::determine_device_class(pci_address()), queue_index);
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return true;
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}
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bool Device::setup_queues(u16 requested_queue_count)
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{
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VERIFY(!m_did_setup_queues);
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m_did_setup_queues = true;
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if (m_common_cfg) {
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auto maximum_queue_count = config_read16(*m_common_cfg, COMMON_CFG_NUM_QUEUES);
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if (requested_queue_count == 0) {
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m_queue_count = maximum_queue_count;
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} else if (requested_queue_count > maximum_queue_count) {
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dbgln("{}: {} queues requested but only {} available!", VirtIO::determine_device_class(pci_address()), m_queue_count, maximum_queue_count);
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return false;
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} else {
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m_queue_count = requested_queue_count;
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}
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} else {
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m_queue_count = requested_queue_count;
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dbgln("{}: device's available queue count could not be determined!", VirtIO::determine_device_class(pci_address()));
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}
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dbgln_if(VIRTIO_DEBUG, "{}: Setting up {} queues", VirtIO::determine_device_class(pci_address()), m_queue_count);
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for (u16 i = 0; i < m_queue_count; i++) {
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if (!setup_queue(i))
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return false;
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}
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for (u16 i = 0; i < m_queue_count; i++) { // Queues can only be activated *after* all others queues were also configured
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if (!activate_queue(i))
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return false;
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}
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return true;
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}
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void Device::finish_init()
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{
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VERIFY(m_did_accept_features); // ensure features were negotiated
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VERIFY(m_did_setup_queues); // ensure queues were set-up
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VERIFY(!(m_status & DEVICE_STATUS_DRIVER_OK)); // ensure we didn't already finish the initialization
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set_status_bit(DEVICE_STATUS_DRIVER_OK);
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dbgln_if(VIRTIO_DEBUG, "{}: Finished initialization", VirtIO::determine_device_class(pci_address()));
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}
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u8 Device::isr_status()
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{
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if (!m_isr_cfg)
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return in<u8>(REG_ISR_STATUS);
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return config_read8(*m_isr_cfg, 0);
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}
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bool Device::handle_irq(const RegisterState&)
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{
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u8 isr_type = isr_status();
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if ((isr_type & (QUEUE_INTERRUPT | DEVICE_CONFIG_INTERRUPT)) == 0) {
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dbgln_if(VIRTIO_DEBUG, "{}: Handling interrupt with unknown type: {}", VirtIO::determine_device_class(pci_address()), isr_type);
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return false;
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}
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if (isr_type & DEVICE_CONFIG_INTERRUPT) {
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dbgln_if(VIRTIO_DEBUG, "{}: VirtIO Device config interrupt!", VirtIO::determine_device_class(pci_address()));
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if (!handle_device_config_change()) {
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set_status_bit(DEVICE_STATUS_FAILED);
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dbgln("{}: Failed to handle device config change!", VirtIO::determine_device_class(pci_address()));
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}
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}
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if (isr_type & QUEUE_INTERRUPT) {
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dbgln_if(VIRTIO_DEBUG, "{}: VirtIO Queue interrupt!", VirtIO::determine_device_class(pci_address()));
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for (size_t i = 0; i < m_queues.size(); i++) {
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if (get_queue(i).new_data_available()) {
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handle_queue_update(i);
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return true;
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}
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}
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dbgln_if(VIRTIO_DEBUG, "{}: Got queue interrupt but all queues are up to date!", VirtIO::determine_device_class(pci_address()));
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}
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return true;
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}
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void Device::supply_chain_and_notify(u16 queue_index, QueueChain& chain)
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{
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auto& queue = get_queue(queue_index);
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VERIFY(&chain.queue() == &queue);
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VERIFY(queue.lock().is_locked());
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chain.submit_to_queue();
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if (queue.should_notify())
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notify_queue(queue_index);
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}
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}
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