mirror of
https://github.com/RGBCube/serenity
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500b7b08d6
The Storage subsystem, like the Audio and HID subsystems, exposes Unix device files (for example, in the /dev directory). To ensure consistency across the repository, we should make the Storage subsystem to reside in the Kernel/Devices directory like the two other mentioned subsystems.
106 lines
3.2 KiB
C++
106 lines
3.2 KiB
C++
/*
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* Copyright (c) 2021, Pankaj R <pankydev8@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/AtomicRefCounted.h>
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#include <AK/HashMap.h>
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#include <AK/OwnPtr.h>
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#include <AK/Types.h>
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#include <Kernel/Bus/PCI/Device.h>
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#include <Kernel/Devices/Storage/NVMe/NVMeDefinitions.h>
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#include <Kernel/Interrupts/IRQHandler.h>
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#include <Kernel/Library/LockRefPtr.h>
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#include <Kernel/Library/NonnullLockRefPtr.h>
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#include <Kernel/Locking/Spinlock.h>
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#include <Kernel/Memory/MemoryManager.h>
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#include <Kernel/Memory/TypedMapping.h>
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namespace Kernel {
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struct DoorbellRegister {
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u32 sq_tail;
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u32 cq_head;
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};
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enum class QueueType {
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Polled,
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IRQ
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};
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class AsyncBlockDeviceRequest;
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struct NVMeIO {
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RefPtr<AsyncBlockDeviceRequest> request;
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bool used = false;
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Function<void(u16 status)> end_io_handler;
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};
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class NVMeController;
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class NVMeQueue : public AtomicRefCounted<NVMeQueue> {
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public:
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static ErrorOr<NonnullLockRefPtr<NVMeQueue>> try_create(NVMeController& device, u16 qid, u8 irq, u32 q_depth, OwnPtr<Memory::Region> cq_dma_region, OwnPtr<Memory::Region> sq_dma_region, Memory::TypedMapping<DoorbellRegister volatile> db_regs, QueueType queue_type);
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bool is_admin_queue() { return m_admin_queue; };
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u16 submit_sync_sqe(NVMeSubmission&);
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void read(AsyncBlockDeviceRequest& request, u16 nsid, u64 index, u32 count);
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void write(AsyncBlockDeviceRequest& request, u16 nsid, u64 index, u32 count);
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virtual void submit_sqe(NVMeSubmission&);
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virtual ~NVMeQueue();
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protected:
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u32 process_cq();
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void update_sq_doorbell()
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{
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m_db_regs->sq_tail = m_sq_tail;
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}
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NVMeQueue(NonnullOwnPtr<Memory::Region> rw_dma_region, Memory::PhysicalPage const& rw_dma_page, u16 qid, u32 q_depth, OwnPtr<Memory::Region> cq_dma_region, OwnPtr<Memory::Region> sq_dma_region, Memory::TypedMapping<DoorbellRegister volatile> db_regs);
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[[nodiscard]] u32 get_request_cid()
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{
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u32 expected_tag = m_tag.load(AK::memory_order_acquire);
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for (;;) {
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u32 cid = expected_tag + 1;
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if (cid == m_qdepth)
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cid = 0;
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if (m_tag.compare_exchange_strong(expected_tag, cid, AK::memory_order_acquire))
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return cid;
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}
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}
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private:
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bool cqe_available();
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void update_cqe_head();
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virtual void complete_current_request(u16 cmdid, u16 status) = 0;
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void update_cq_doorbell()
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{
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m_db_regs->cq_head = m_cq_head;
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}
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protected:
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Spinlock<LockRank::Interrupts> m_cq_lock {};
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HashMap<u16, NVMeIO> m_requests;
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NonnullOwnPtr<Memory::Region> m_rw_dma_region;
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Spinlock<LockRank::None> m_request_lock {};
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private:
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u16 m_qid {};
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u8 m_cq_valid_phase { 1 };
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u16 m_sq_tail {};
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u16 m_cq_head {};
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bool m_admin_queue { false };
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u32 m_qdepth {};
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Atomic<u32> m_tag { 0 }; // used for the cid in a submission queue entry
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Spinlock<LockRank::Interrupts> m_sq_lock {};
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OwnPtr<Memory::Region> m_cq_dma_region;
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Span<NVMeSubmission> m_sqe_array;
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OwnPtr<Memory::Region> m_sq_dma_region;
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Span<NVMeCompletion> m_cqe_array;
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WaitQueue m_sync_wait_queue;
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Memory::TypedMapping<DoorbellRegister volatile> m_db_regs;
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NonnullRefPtr<Memory::PhysicalPage const> const m_rw_dma_page;
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};
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}
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