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			358 lines
		
	
	
	
		
			8.7 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			358 lines
		
	
	
	
		
			8.7 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
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|  * All rights reserved.
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions are met:
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|  *
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|  * 1. Redistributions of source code must retain the above copyright notice, this
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|  *    list of conditions and the following disclaimer.
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|  *
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|  * 2. Redistributions in binary form must reproduce the above copyright notice,
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|  *    this list of conditions and the following disclaimer in the documentation
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|  *    and/or other materials provided with the distribution.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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|  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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|  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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|  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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|  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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|  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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|  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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|  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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|  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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|  */
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| 
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| #pragma once
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| 
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| #include <AK/StdLibExtras.h>
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| #include <AK/String.h>
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| #include <AK/Types.h>
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| 
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| namespace X86 {
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| 
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| class Instruction;
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| struct InstructionDescriptor;
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| 
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| class SymbolProvider {
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| public:
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|     virtual String symbolicate(FlatPtr, u32* offset = nullptr) const = 0;
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| };
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| 
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| template<typename T>
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| struct TypeTrivia {
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|     static const size_t bits = sizeof(T) * 8;
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|     static const T sign_bit = 1 << (bits - 1);
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|     static const T mask = typename MakeUnsigned<T>::type(-1);
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| };
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| 
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| template<typename T, typename U>
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| inline constexpr T sign_extended_to(U value)
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| {
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|     if (!(value & TypeTrivia<U>::sign_bit))
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|         return value;
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|     return (TypeTrivia<T>::mask & ~TypeTrivia<U>::mask) | value;
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| }
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| 
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| struct Prefix {
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|     enum Op {
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|         OperandSizeOverride = 0x66,
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|         AddressSizeOverride = 0x67,
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|         REP = 0xf3,
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|         REPZ = 0xf3,
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|         REPNZ = 0xf2,
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|         LOCK = 0xf0,
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|     };
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| };
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| 
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| enum class SegmentRegister {
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|     ES = 0,
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|     CS,
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|     SS,
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|     DS,
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|     FS,
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|     GS,
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|     SegR6,
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|     SegR7,
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|     None = 0xFF,
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| };
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| 
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| enum RegisterIndex8 {
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|     RegisterAL = 0,
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|     RegisterCL,
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|     RegisterDL,
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|     RegisterBL,
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|     RegisterAH,
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|     RegisterCH,
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|     RegisterDH,
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|     RegisterBH
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| };
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| 
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| enum RegisterIndex16 {
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|     RegisterAX = 0,
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|     RegisterCX,
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|     RegisterDX,
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|     RegisterBX,
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|     RegisterSP,
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|     RegisterBP,
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|     RegisterSI,
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|     RegisterDI
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| };
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| 
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| enum RegisterIndex32 {
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|     RegisterEAX = 0,
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|     RegisterECX,
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|     RegisterEDX,
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|     RegisterEBX,
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|     RegisterESP,
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|     RegisterEBP,
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|     RegisterESI,
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|     RegisterEDI
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| };
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| 
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| enum MMXRegisterIndex {
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|     RegisterMM0 = 0,
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|     RegisterMM1,
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|     RegisterMM2,
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|     RegisterMM3,
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|     RegisterMM4,
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|     RegisterMM5,
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|     RegisterMM6,
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|     RegisterMM7
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| };
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| 
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| class LogicalAddress {
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| public:
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|     LogicalAddress() {}
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|     LogicalAddress(u16 selector, u32 offset)
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|         : m_selector(selector)
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|         , m_offset(offset)
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|     {
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|     }
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| 
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|     u16 selector() const { return m_selector; }
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|     u32 offset() const { return m_offset; }
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|     void set_selector(u16 selector) { m_selector = selector; }
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|     void set_offset(u32 offset) { m_offset = offset; }
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| 
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| private:
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|     u16 m_selector { 0 };
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|     u32 m_offset { 0 };
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| };
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| 
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| class InstructionStream {
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| public:
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|     virtual bool can_read() = 0;
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|     virtual u8 read8() = 0;
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|     virtual u16 read16() = 0;
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|     virtual u32 read32() = 0;
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|     u32 read(unsigned count);
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| };
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| 
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| class SimpleInstructionStream final : public InstructionStream {
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| public:
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|     SimpleInstructionStream(const u8* data, size_t size)
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|         : m_data(data)
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|         , m_size(size)
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|     {
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|     }
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| 
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|     virtual bool can_read() override { return m_offset < m_size; }
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| 
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|     virtual u8 read8() override
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|     {
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|         if (!can_read())
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|             return 0;
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|         return m_data[m_offset++];
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|     }
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|     virtual u16 read16() override
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|     {
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|         u8 lsb = read8();
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|         u8 msb = read8();
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|         return ((u16)msb << 8) | (u16)lsb;
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|     }
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| 
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|     virtual u32 read32() override
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|     {
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|         u16 lsw = read16();
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|         u16 msw = read16();
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|         return ((u32)msw << 16) | (u32)lsw;
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|     }
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| 
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|     size_t offset() const { return m_offset; }
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| 
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| private:
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|     const u8* m_data { nullptr };
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|     size_t m_offset { 0 };
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|     size_t m_size { 0 };
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| };
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| 
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| class MemoryOrRegisterReference {
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|     friend class Instruction;
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| 
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| public:
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|     String to_string_o8() const;
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|     String to_string_o16() const;
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|     String to_string_o32() const;
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|     String to_string_mm() const;
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| 
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|     bool is_register() const { return m_register_index != 0xffffffff; }
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|     SegmentRegister segment() const
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|     {
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|         ASSERT(!is_register());
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|         return m_segment;
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|     }
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|     u32 offset();
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| 
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| private:
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|     MemoryOrRegisterReference() {}
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| 
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|     String to_string() const;
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|     String to_string_a16() const;
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|     String to_string_a32() const;
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| 
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|     void decode(InstructionStream&, bool a32);
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|     void decode16(InstructionStream&);
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|     void decode32(InstructionStream&);
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| 
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|     unsigned m_register_index { 0xffffffff };
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|     SegmentRegister m_segment { SegmentRegister::None };
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|     union {
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|         u32 m_offset32 { 0 };
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|         u16 m_offset16;
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|     };
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| 
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|     u8 m_a32 { false };
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| 
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|     u8 m_rm { 0 };
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|     u8 m_sib { 0 };
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|     u8 m_displacement_bytes { 0 };
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| 
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|     union {
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|         u32 m_displacement32 { 0 };
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|         u16 m_displacement16;
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|     };
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| 
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|     bool m_has_sib { false };
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| };
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| 
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| class Instruction {
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| public:
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|     static Instruction from_stream(InstructionStream&, bool o32, bool a32);
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|     ~Instruction() {}
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| 
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|     MemoryOrRegisterReference& modrm()
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|     {
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|         ASSERT(has_rm());
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|         return m_modrm;
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|     }
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| 
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|     bool has_segment_prefix() const { return m_segment_prefix != SegmentRegister::None; }
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|     bool has_address_size_override_prefix() const { return m_has_address_size_override_prefix; }
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|     bool has_operand_size_override_prefix() const { return m_has_operand_size_override_prefix; }
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|     bool has_lock_prefix() const { return m_has_lock_prefix; }
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|     bool has_rep_prefix() const { return m_rep_prefix; }
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|     u8 rep_prefix() const { return m_rep_prefix; }
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| 
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|     bool is_valid() const { return m_descriptor; }
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| 
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|     unsigned length() const;
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| 
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|     String mnemonic() const;
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| 
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|     u8 op() const { return m_op; }
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|     u8 sub_op() const { return m_sub_op; }
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|     u8 rm() const { return m_modrm.m_rm; }
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|     u8 slash() const
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|     {
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|         ASSERT(has_rm());
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|         return (rm() >> 3) & 7;
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|     }
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| 
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|     u8 imm8() const
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|     {
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|         ASSERT(m_imm1_bytes == 1);
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|         return m_imm1;
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|     }
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|     u16 imm16() const
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|     {
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|         ASSERT(m_imm1_bytes == 2);
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|         return m_imm1;
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|     }
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|     u32 imm32() const
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|     {
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|         ASSERT(m_imm1_bytes == 4);
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|         return m_imm1;
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|     }
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| 
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|     u8 imm8_1() const { return imm8(); }
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|     u8 imm8_2() const
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|     {
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|         ASSERT(m_imm2_bytes == 1);
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|         return m_imm2;
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|     }
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|     u16 imm16_1() const { return imm16(); }
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|     u16 imm16_2() const
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|     {
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|         ASSERT(m_imm2_bytes == 2);
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|         return m_imm2;
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|     }
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|     u32 imm32_1() const { return imm32(); }
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|     u32 imm32_2() const
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|     {
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|         ASSERT(m_imm2_bytes == 4);
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|         return m_imm2;
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|     }
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| 
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|     u32 imm_address() const { return m_a32 ? imm32() : imm16(); }
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| 
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|     LogicalAddress imm_address16_16() const { return LogicalAddress(imm16_1(), imm16_2()); }
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|     LogicalAddress imm_address16_32() const { return LogicalAddress(imm16_1(), imm32_2()); }
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| 
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|     bool has_rm() const { return m_has_rm; }
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|     bool has_sub_op() const { return m_has_sub_op; }
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| 
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|     unsigned register_index() const { return m_register_index; }
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|     SegmentRegister segment_register() const { return static_cast<SegmentRegister>(register_index()); }
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| 
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|     u8 cc() const { return m_has_sub_op ? m_sub_op & 0xf : m_op & 0xf; }
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| 
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|     String to_string(u32 origin, const SymbolProvider* = nullptr, bool x32 = true) const;
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| 
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| private:
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|     Instruction(InstructionStream&, bool o32, bool a32);
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| 
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|     String to_string_internal(u32 origin, const SymbolProvider*, bool x32) const;
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| 
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|     const char* reg8_name() const;
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|     const char* reg16_name() const;
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|     const char* reg32_name() const;
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| 
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|     u8 m_op { 0 };
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|     u8 m_sub_op { 0 };
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|     u32 m_imm1 { 0 };
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|     u32 m_imm2 { 0 };
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|     u8 m_register_index { 0 };
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|     bool m_a32 { false };
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|     bool m_o32 { false };
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|     bool m_has_lock_prefix { false };
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| 
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|     bool m_has_sub_op { false };
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|     bool m_has_rm { false };
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| 
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|     unsigned m_imm1_bytes { 0 };
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|     unsigned m_imm2_bytes { 0 };
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|     unsigned m_prefix_bytes { 0 };
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| 
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|     SegmentRegister m_segment_prefix { SegmentRegister::None };
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|     bool m_has_operand_size_override_prefix { false };
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|     bool m_has_address_size_override_prefix { false };
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|     u8 m_rep_prefix { 0 };
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| 
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|     MemoryOrRegisterReference m_modrm;
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| 
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|     InstructionDescriptor* m_descriptor { nullptr };
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| };
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| 
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| }
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