mirror of
https://github.com/RGBCube/serenity
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b91df26d4a
If we are in a shared interrupt handler, the called handlers might indicate it was not their interrupt, so we should not increment the call counter of these handlers.
101 lines
3.5 KiB
C++
101 lines
3.5 KiB
C++
/*
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/CommandLine.h>
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#include <Kernel/Storage/AHCIPortHandler.h>
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namespace Kernel {
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NonnullRefPtr<AHCIPortHandler> AHCIPortHandler::create(AHCIController& controller, u8 irq, AHCI::MaskedBitField taken_ports)
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{
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return adopt_ref(*new AHCIPortHandler(controller, irq, taken_ports));
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}
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AHCIPortHandler::AHCIPortHandler(AHCIController& controller, u8 irq, AHCI::MaskedBitField taken_ports)
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: IRQHandler(irq)
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, m_parent_controller(controller)
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, m_taken_ports(taken_ports)
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, m_pending_ports_interrupts(create_pending_ports_interrupts_bitfield())
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{
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// FIXME: Use the number of taken ports to determine how many pages we should allocate.
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for (size_t index = 0; index < (((size_t)AHCI::Limits::MaxPorts * 512) / PAGE_SIZE); index++) {
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m_identify_metadata_pages.append(MM.allocate_supervisor_physical_page().release_nonnull());
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}
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dbgln_if(AHCI_DEBUG, "AHCI Port Handler: IRQ {}", irq);
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// Clear pending interrupts, if there are any!
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m_pending_ports_interrupts.set_all();
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enable_irq();
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if (kernel_command_line().ahci_reset_mode() == AHCIResetMode::Aggressive) {
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for (auto index : taken_ports.to_vector()) {
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auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(controller.hba().port_regs[index]), index);
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m_handled_ports.set(index, port);
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port->reset();
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}
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return;
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}
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for (auto index : taken_ports.to_vector()) {
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auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(controller.hba().port_regs[index]), index);
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m_handled_ports.set(index, port);
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port->initialize_without_reset();
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}
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}
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void AHCIPortHandler::enumerate_ports(Function<void(const AHCIPort&)> callback) const
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{
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for (auto& port : m_handled_ports) {
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callback(*port.value);
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}
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}
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RefPtr<AHCIPort> AHCIPortHandler::port_at_index(u32 port_index) const
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{
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VERIFY(m_taken_ports.is_set_at(port_index));
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auto it = m_handled_ports.find(port_index);
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if (it == m_handled_ports.end())
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return nullptr;
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return (*it).value;
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}
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PhysicalAddress AHCIPortHandler::get_identify_metadata_physical_region(u32 port_index) const
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{
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dbgln_if(AHCI_DEBUG, "AHCI Port Handler: Get identify metadata physical address of port {} - {}", port_index, (port_index * 512) / PAGE_SIZE);
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return m_identify_metadata_pages[(port_index * 512) / PAGE_SIZE].paddr().offset((port_index * 512) % PAGE_SIZE);
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}
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AHCI::MaskedBitField AHCIPortHandler::create_pending_ports_interrupts_bitfield() const
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{
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return AHCI::MaskedBitField((volatile u32&)m_parent_controller->hba().control_regs.is, m_taken_ports.bit_mask());
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}
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AHCI::HBADefinedCapabilities AHCIPortHandler::hba_capabilities() const
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{
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return m_parent_controller->hba_capabilities();
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}
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AHCIPortHandler::~AHCIPortHandler()
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{
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}
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bool AHCIPortHandler::handle_irq(const RegisterState&)
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{
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dbgln_if(AHCI_DEBUG, "AHCI Port Handler: IRQ received");
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if (m_pending_ports_interrupts.is_zeroed())
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return false;
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for (auto port_index : m_pending_ports_interrupts.to_vector()) {
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auto port = m_handled_ports.get(port_index);
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VERIFY(port.has_value());
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dbgln_if(AHCI_DEBUG, "AHCI Port Handler: Handling IRQ for port {}", port_index);
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port.value()->handle_interrupt();
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// We do this to clear the pending interrupt after we handled it.
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m_pending_ports_interrupts.set_at(port_index);
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}
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return true;
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}
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}
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