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The VirtIO specification defines many types of devices with different purposes, and it also defines 3 possible transport mediums where devices could be connected to the host machine. We only care about the PCIe transport, but this commit puts the actual foundations for supporting the lean MMIO transport too in the future. To ensure things are kept abstracted but still functional, the VirtIO transport code is responsible for what is deemed as related to an actual transport type - allocation of interrupt handlers and tinkering with low level transport-related registers, etc.
161 lines
7 KiB
C++
161 lines
7 KiB
C++
/*
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* Copyright (c) 2023, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Bus/PCI/API.h>
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#include <Kernel/Bus/PCI/IDs.h>
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#include <Kernel/Bus/VirtIO/Transport/PCIe/InterruptHandler.h>
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#include <Kernel/Bus/VirtIO/Transport/PCIe/TransportLink.h>
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namespace Kernel::VirtIO {
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ErrorOr<NonnullOwnPtr<TransportEntity>> PCIeTransportLink::create(PCI::DeviceIdentifier const& pci_identifier)
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{
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return TRY(adopt_nonnull_own_or_enomem(new (nothrow) PCIeTransportLink(pci_identifier)));
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}
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StringView PCIeTransportLink::determine_device_class_name() const
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{
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if (device_identifier().revision_id().value() == 0) {
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// Note: If the device is a legacy (or transitional) device, therefore,
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// probe the subsystem ID in the PCI header and figure out the
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auto subsystem_device_id = device_identifier().subsystem_id().value();
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switch (subsystem_device_id) {
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case 1:
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return "VirtIONetAdapter"sv;
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case 2:
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return "VirtIOBlockDevice"sv;
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case 3:
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return "VirtIOConsole"sv;
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case 4:
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return "VirtIORNG"sv;
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default:
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dbgln("VirtIO: Unknown subsystem_device_id {}", subsystem_device_id);
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VERIFY_NOT_REACHED();
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}
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}
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auto id = device_identifier().hardware_id();
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VERIFY(id.vendor_id == PCI::VendorID::VirtIO);
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switch (id.device_id) {
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case PCI::DeviceID::VirtIONetAdapter:
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return "VirtIONetAdapter"sv;
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case PCI::DeviceID::VirtIOBlockDevice:
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return "VirtIOBlockDevice"sv;
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case PCI::DeviceID::VirtIOConsole:
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return "VirtIOConsole"sv;
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case PCI::DeviceID::VirtIOEntropy:
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return "VirtIORNG"sv;
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case PCI::DeviceID::VirtIOGPU:
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return "VirtIOGPU"sv;
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default:
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dbgln("VirtIO: Unknown device_id {}", id.vendor_id);
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VERIFY_NOT_REACHED();
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}
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}
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ErrorOr<void> PCIeTransportLink::create_interrupt_handler(VirtIO::Device& parent_device)
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{
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TRY(reserve_irqs(1, false));
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auto irq = MUST(allocate_irq(0));
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m_irq_handler = TRY(PCIeTransportInterruptHandler::create(*this, parent_device, irq));
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return {};
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}
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PCIeTransportLink::PCIeTransportLink(PCI::DeviceIdentifier const& pci_identifier)
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: PCI::Device(pci_identifier)
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{
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dbgln("{}: Found @ {}", determine_device_class_name(), device_identifier().address());
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}
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ErrorOr<void> PCIeTransportLink::locate_configurations_and_resources(Badge<VirtIO::Device>, VirtIO::Device& parent_device)
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{
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TRY(create_interrupt_handler(parent_device));
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PCI::enable_bus_mastering(device_identifier());
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auto capabilities = device_identifier().capabilities();
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for (auto& capability : capabilities) {
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if (capability.id().value() == PCI::Capabilities::ID::VendorSpecific) {
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// We have a virtio_pci_cap
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Configuration config {};
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auto raw_config_type = capability.read8(0x3);
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// NOTE: The VirtIO specification allows iteration of configurations
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// through a special PCI capbility structure with the VIRTIO_PCI_CAP_PCI_CFG tag:
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//
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// "Each structure can be mapped by a Base Address register (BAR) belonging to the function, or accessed via
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// the special VIRTIO_PCI_CAP_PCI_CFG field in the PCI configuration space"
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//
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// "The VIRTIO_PCI_CAP_PCI_CFG capability creates an alternative (and likely suboptimal) access method
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// to the common configuration, notification, ISR and device-specific configuration regions."
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//
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// Also, it is *very* likely to see this PCI capability as the first vendor-specific capbility of a certain PCI function,
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// but this is not guaranteed by the VirtIO specification.
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// Therefore, ignore this type of configuration as this is not needed by our implementation currently.
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if (raw_config_type == static_cast<u8>(ConfigurationType::PCICapabilitiesAccess))
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continue;
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if (raw_config_type < static_cast<u8>(ConfigurationType::Common) || raw_config_type > static_cast<u8>(ConfigurationType::PCICapabilitiesAccess)) {
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dbgln("{}: Unknown capability configuration type: {}", device_name(), raw_config_type);
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return Error::from_errno(ENXIO);
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}
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config.cfg_type = static_cast<ConfigurationType>(raw_config_type);
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auto cap_length = capability.read8(0x2);
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if (cap_length < 0x10) {
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dbgln("{}: Unexpected capability size: {}", device_name(), cap_length);
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break;
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}
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config.resource_index = capability.read8(0x4);
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if (config.resource_index > 0x5) {
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dbgln("{}: Unexpected capability BAR value: {}", device_name(), config.resource_index);
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break;
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}
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config.offset = capability.read32(0x8);
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config.length = capability.read32(0xc);
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// NOTE: Configuration length of zero is an invalid configuration, or at the very least a configuration
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// type we don't know how to handle correctly...
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// The VIRTIO_PCI_CAP_PCI_CFG configuration structure has length of 0
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// but because we ignore that type and all other types should have a length
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// greater than 0, we should ignore any other configuration in case this condition is not met.
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if (config.length == 0) {
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dbgln("{}: Found configuration {}, with invalid length of 0", device_name(), (u32)config.cfg_type);
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continue;
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}
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dbgln_if(VIRTIO_DEBUG, "{}: Found configuration {}, resource: {}, offset: {}, length: {}", device_name(), (u32)config.cfg_type, config.resource_index, config.offset, config.length);
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if (config.cfg_type == ConfigurationType::Common)
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m_use_mmio = true;
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else if (config.cfg_type == ConfigurationType::Notify)
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m_notify_multiplier = capability.read32(0x10);
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m_configs.append(config);
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}
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}
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if (m_use_mmio) {
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for (auto& cfg : m_configs) {
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auto mapping_io_window = TRY(IOWindow::create_for_pci_device_bar(device_identifier(), static_cast<PCI::HeaderType0BaseRegister>(cfg.resource_index)));
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m_register_bases[cfg.resource_index] = move(mapping_io_window);
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}
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m_common_cfg = TRY(get_config(ConfigurationType::Common, 0));
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m_notify_cfg = TRY(get_config(ConfigurationType::Notify, 0));
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m_isr_cfg = TRY(get_config(ConfigurationType::ISR, 0));
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} else {
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auto mapping_io_window = TRY(IOWindow::create_for_pci_device_bar(device_identifier(), PCI::HeaderType0BaseRegister::BAR0));
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m_register_bases[0] = move(mapping_io_window);
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}
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return {};
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}
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void PCIeTransportLink::disable_interrupts(Badge<VirtIO::Device>)
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{
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disable_pin_based_interrupts();
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m_irq_handler->disable_irq();
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}
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void PCIeTransportLink::enable_interrupts(Badge<VirtIO::Device>)
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{
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m_irq_handler->enable_irq();
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enable_pin_based_interrupts();
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}
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}
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