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We used to not care about stopping an audio output stream for Intel HDA since AudioServer would continuously send new buffers to play. Since 707f5ac150ef858760eb9faa52b9ba80c50c4262 however, that has changed. Intel HDA now uses interrupts to detect when each buffer was completed by the device, and uses a simple heuristic to detect whether a buffer underrun has occurred so it can stop the output stream. This was tested on Qemu's Intel HDA (Linux x86_64) and a bare metal MSI Starship/Matisse HD Audio Controller.
132 lines
3.8 KiB
C++
132 lines
3.8 KiB
C++
/*
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* Copyright (c) 2023, Jelle Raaijmakers <jelle@gmta.nl>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Badge.h>
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#include <AK/Error.h>
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#include <AK/NonnullOwnPtr.h>
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#include <AK/OwnPtr.h>
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#include <Kernel/Devices/Audio/IntelHDA/Codec.h>
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#include <Kernel/Devices/Audio/IntelHDA/Format.h>
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#include <Kernel/Library/IOWindow.h>
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#include <Kernel/Locking/SpinlockProtected.h>
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#include <Kernel/Tasks/WaitQueue.h>
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namespace Kernel::Audio::IntelHDA {
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class Stream {
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public:
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static constexpr u32 cyclic_buffer_size_in_ms = 40;
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virtual ~Stream();
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u8 stream_number() const { return m_stream_number; }
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bool running() const { return m_running; }
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u32 sample_rate() const { return m_format_parameters.sample_rate; }
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void start();
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ErrorOr<void> stop();
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virtual ErrorOr<void> handle_interrupt(Badge<Controller>) = 0;
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ErrorOr<void> set_format(FormatParameters);
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protected:
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// We always need 2 filled buffers, plus an additional one to prevent buffer underrun
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static constexpr u8 minimum_number_of_buffers = 3;
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// 3.3: High Definition Audio Controller Register Set - streams
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enum StreamRegisterOffset : u8 {
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Control = 0x00,
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Status = 0x03,
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LinkPosition = 0x04,
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CyclicBufferLength = 0x08,
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LastValidIndex = 0x0c,
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Format = 0x12,
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BDLLowerBaseAddress = 0x18,
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BDLUpperBaseAddress = 0x1c,
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};
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// 3.3.35: Input/Output/Bidirectional Stream Descriptor Control
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enum StreamControlFlag : u32 {
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StreamReset = 1u << 0,
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StreamRun = 1u << 1,
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InterruptOnCompletionEnable = 1u << 2,
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};
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// 3.3.36 : Input/Output/Bidirectional Stream Descriptor Status
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enum StreamStatusFlag : u8 {
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BufferCompletionInterruptStatus = 1u << 2,
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};
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// 3.6.3: Buffer Descriptor List Entry
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enum BufferDescriptorEntryFlag : u32 {
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InterruptOnCompletion = 1u << 0,
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};
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// 3.6.3: Buffer Descriptor List Entry
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struct BufferDescriptorEntry {
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u64 address;
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u32 size;
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BufferDescriptorEntryFlag flags;
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};
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Stream(NonnullOwnPtr<IOWindow> stream_io_window, u8 stream_number)
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: m_stream_io_window(move(stream_io_window))
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, m_stream_number(stream_number)
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{
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}
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u32 read_control();
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void write_control(u32);
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ErrorOr<void> initialize_buffer();
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ErrorOr<void> reset();
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NonnullOwnPtr<IOWindow> m_stream_io_window;
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u8 m_stream_number;
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OwnPtr<Memory::Region> m_buffer_descriptor_list;
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SpinlockProtected<OwnPtr<Memory::Region>, LockRank::None> m_buffers;
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size_t m_buffer_position { 0 };
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WaitQueue m_irq_queue;
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bool m_running { false };
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FormatParameters m_format_parameters;
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};
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class OutputStream : public Stream {
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public:
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static constexpr u8 fixed_channel = 0;
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static ErrorOr<NonnullOwnPtr<OutputStream>> create(NonnullOwnPtr<IOWindow> stream_io_window, u8 stream_number)
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{
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return adopt_nonnull_own_or_enomem(new (nothrow) OutputStream(move(stream_io_window), stream_number));
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}
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~OutputStream() = default;
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// ^Stream
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ErrorOr<void> handle_interrupt(Badge<Controller>) override;
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ErrorOr<size_t> write(UserOrKernelBuffer const&, size_t);
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private:
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OutputStream(NonnullOwnPtr<IOWindow> stream_io_window, u8 stream_number)
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: Stream(move(stream_io_window), stream_number)
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{
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// 3.3.35: Input/Output/Bidirectional Stream Descriptor Control
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// "Although the controller hardware is capable of transmitting any stream number,
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// by convention stream 0 is reserved as unused by software, so that converters
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// whose stream numbers have been reset to 0 do not unintentionally decode data
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// not intended for them."
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VERIFY(stream_number >= 1);
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}
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u32 m_last_link_position { 0 };
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};
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// FIXME: implement InputStream and BidirectionalStream
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}
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