mirror of
https://github.com/RGBCube/serenity
synced 2025-05-18 10:45:08 +00:00
252c92d565
This device is supposed to be used in microvm and ISA-PC machine types, and we assume that if we are able to probe for the QEMU BGA version of 0xB0C5, then we have an existing ISA Bochs VGA adapter to utilize. To ensure we don't instantiate the driver for non isa-vga devices, we try to ensure that PCI is disabled because hardware IO test probe failed so we can be sure that we use this special handling code only in the QEMU microvm and ISA-PC machine types. Unfortunately, this means that if for some reason the isa-vga device is attached for the i440FX or Q35 machine types, we simply are not able to drive the device in such setups at all. To determine the amount of VRAM being available, we read VBE register at offset 0xA. That register holds the amount of VRAM divided by 64K, so we need to multiply the value in our code to use the actual VRAM size value again. The isa-vga device requires us to hardcode the framebuffer physical address to 0xE0000000, and that address is not expected to change in the future as many other projects rely on the isa-vga framebuffer to be present at that physical memory address.
65 lines
2.1 KiB
C++
65 lines
2.1 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Bitmap.h>
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#include <AK/Try.h>
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#include <AK/Vector.h>
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#include <Kernel/Bus/PCI/Controller/HostController.h>
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#include <Kernel/Bus/PCI/Definitions.h>
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#include <Kernel/FileSystem/SysFS.h>
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#include <Kernel/Locking/Spinlock.h>
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namespace Kernel::PCI {
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class Access {
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public:
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static bool initialize_for_multiple_pci_domains(PhysicalAddress mcfg_table);
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#if ARCH(I386) || ARCH(X86_64)
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static bool initialize_for_one_pci_domain();
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#endif
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ErrorOr<void> fast_enumerate(Function<void(DeviceIdentifier const&)>&) const;
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void rescan_hardware();
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static Access& the();
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static bool is_initialized();
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static bool is_disabled();
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static bool is_hardware_disabled();
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void write8_field(Address address, u32 field, u8 value);
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void write16_field(Address address, u32 field, u16 value);
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void write32_field(Address address, u32 field, u32 value);
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u8 read8_field(Address address, u32 field);
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u16 read16_field(Address address, u32 field);
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u32 read32_field(Address address, u32 field);
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DeviceIdentifier get_device_identifier(Address address) const;
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Spinlock const& scan_lock() const { return m_scan_lock; }
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RecursiveSpinlock const& access_lock() const { return m_access_lock; }
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ErrorOr<void> add_host_controller_and_enumerate_attached_devices(NonnullOwnPtr<HostController>, Function<void(DeviceIdentifier const&)> callback);
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private:
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u8 read8_field(Address address, RegisterOffset field);
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u16 read16_field(Address address, RegisterOffset field);
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void add_host_controller(NonnullOwnPtr<HostController>);
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bool find_and_register_pci_host_bridges_from_acpi_mcfg_table(PhysicalAddress mcfg);
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Access();
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Vector<Capability> get_capabilities(Address);
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Optional<u8> get_capabilities_pointer(Address address);
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mutable RecursiveSpinlock m_access_lock { LockRank::None };
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mutable Spinlock m_scan_lock { LockRank::None };
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HashMap<u32, NonnullOwnPtr<HostController>> m_host_controllers;
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Vector<DeviceIdentifier> m_device_identifiers;
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};
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}
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