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	 6e46e21c42
			
		
	
	
		6e46e21c42
		
	
	
	
	
		
			
			This allows us to enable Write-Combine on e.g. framebuffers, significantly improving performance on bare metal. To keep things simple we right now only use one of up to three bits (bit 7 in the PTE), which maps to the PA4 entry in the PAT MSR, which we set to the Write-Combine mode on each CPU at boot time.
		
			
				
	
	
		
			156 lines
		
	
	
	
		
			4.5 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			156 lines
		
	
	
	
		
			4.5 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2018-2021, Andreas Kling <kling@serenityos.org>
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|  *
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|  * SPDX-License-Identifier: BSD-2-Clause
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|  */
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| 
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| #pragma once
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| 
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| #include <AK/Badge.h>
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| #include <AK/Types.h>
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| #include <Kernel/Forward.h>
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| #include <Kernel/PhysicalAddress.h>
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| 
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| #include <AK/Platform.h>
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| VALIDATE_IS_X86()
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| 
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| namespace Kernel {
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| 
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| class PageDirectoryEntry {
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| public:
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|     PhysicalPtr page_table_base() const { return PhysicalAddress::physical_page_base(m_raw); }
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|     void set_page_table_base(u32 value)
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|     {
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|         m_raw &= 0x8000000000000fffULL;
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|         m_raw |= PhysicalAddress::physical_page_base(value);
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|     }
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| 
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|     bool is_null() const { return m_raw == 0; }
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|     void clear() { m_raw = 0; }
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| 
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|     u64 raw() const { return m_raw; }
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|     void copy_from(Badge<Memory::PageDirectory>, const PageDirectoryEntry& other) { m_raw = other.m_raw; }
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| 
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|     enum Flags {
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|         Present = 1 << 0,
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|         ReadWrite = 1 << 1,
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|         UserSupervisor = 1 << 2,
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|         WriteThrough = 1 << 3,
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|         CacheDisabled = 1 << 4,
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|         Huge = 1 << 7,
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|         Global = 1 << 8,
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|         NoExecute = 0x8000000000000000ULL,
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|     };
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| 
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|     bool is_present() const { return (raw() & Present) == Present; }
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|     void set_present(bool b) { set_bit(Present, b); }
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| 
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|     bool is_user_allowed() const { return (raw() & UserSupervisor) == UserSupervisor; }
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|     void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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| 
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|     bool is_huge() const { return (raw() & Huge) == Huge; }
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|     void set_huge(bool b) { set_bit(Huge, b); }
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| 
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|     bool is_writable() const { return (raw() & ReadWrite) == ReadWrite; }
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|     void set_writable(bool b) { set_bit(ReadWrite, b); }
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| 
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|     bool is_write_through() const { return (raw() & WriteThrough) == WriteThrough; }
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|     void set_write_through(bool b) { set_bit(WriteThrough, b); }
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| 
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|     bool is_cache_disabled() const { return (raw() & CacheDisabled) == CacheDisabled; }
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|     void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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| 
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|     bool is_global() const { return (raw() & Global) == Global; }
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|     void set_global(bool b) { set_bit(Global, b); }
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| 
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|     bool is_execute_disabled() const { return (raw() & NoExecute) == NoExecute; }
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|     void set_execute_disabled(bool b) { set_bit(NoExecute, b); }
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| 
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| private:
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|     void set_bit(u64 bit, bool value)
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|     {
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|         if (value)
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|             m_raw |= bit;
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|         else
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|             m_raw &= ~bit;
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|     }
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| 
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|     u64 m_raw;
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| };
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| 
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| class PageTableEntry {
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| public:
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|     PhysicalPtr physical_page_base() const { return PhysicalAddress::physical_page_base(m_raw); }
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|     void set_physical_page_base(PhysicalPtr value)
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|     {
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|         m_raw &= 0x8000000000000fffULL;
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|         m_raw |= PhysicalAddress::physical_page_base(value);
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|     }
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| 
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|     u64 raw() const { return m_raw; }
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| 
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|     enum Flags {
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|         Present = 1 << 0,
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|         ReadWrite = 1 << 1,
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|         UserSupervisor = 1 << 2,
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|         WriteThrough = 1 << 3,
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|         CacheDisabled = 1 << 4,
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|         PAT = 1 << 7,
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|         Global = 1 << 8,
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|         NoExecute = 0x8000000000000000ULL,
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|     };
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| 
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|     bool is_present() const { return (raw() & Present) == Present; }
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|     void set_present(bool b) { set_bit(Present, b); }
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| 
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|     bool is_user_allowed() const { return (raw() & UserSupervisor) == UserSupervisor; }
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|     void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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| 
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|     bool is_writable() const { return (raw() & ReadWrite) == ReadWrite; }
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|     void set_writable(bool b) { set_bit(ReadWrite, b); }
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| 
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|     bool is_write_through() const { return (raw() & WriteThrough) == WriteThrough; }
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|     void set_write_through(bool b) { set_bit(WriteThrough, b); }
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| 
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|     bool is_cache_disabled() const { return (raw() & CacheDisabled) == CacheDisabled; }
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|     void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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| 
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|     bool is_global() const { return (raw() & Global) == Global; }
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|     void set_global(bool b) { set_bit(Global, b); }
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| 
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|     bool is_execute_disabled() const { return (raw() & NoExecute) == NoExecute; }
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|     void set_execute_disabled(bool b) { set_bit(NoExecute, b); }
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| 
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|     bool is_pat() const { return (raw() & PAT) == PAT; }
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|     void set_pat(bool b) { set_bit(PAT, b); }
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| 
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|     bool is_null() const { return m_raw == 0; }
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|     void clear() { m_raw = 0; }
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| 
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| private:
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|     void set_bit(u64 bit, bool value)
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|     {
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|         if (value)
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|             m_raw |= bit;
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|         else
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|             m_raw &= ~bit;
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|     }
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| 
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|     u64 m_raw;
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| };
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| 
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| static_assert(AssertSize<PageDirectoryEntry, 8>());
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| static_assert(AssertSize<PageTableEntry, 8>());
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| 
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| class PageDirectoryPointerTable {
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| public:
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|     PageDirectoryEntry* directory(size_t index)
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|     {
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|         VERIFY(index <= (NumericLimits<size_t>::max() << 30));
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|         return (PageDirectoryEntry*)(PhysicalAddress::physical_page_base(raw[index]));
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|     }
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| 
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|     u64 raw[512];
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| };
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| 
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| }
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