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30fc78bfaf
Also, InterruptDisabler were added to prevent critical function from being interrupted. In addition, the interrupt numbers are abstracted from IDT offsets, thus, allowing to create a better routing scheme when using IOAPICs for interrupt redirection.
85 lines
3.3 KiB
C++
85 lines
3.3 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#pragma once
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#include <Kernel/Interrupts/IRQController.h>
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namespace Kernel {
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struct [[gnu::packed]] ioapic_mmio_regs
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{
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volatile u32 select;
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u32 reserved[3];
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volatile u32 window;
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};
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class ISAInterruptOverrideMetadata;
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class PCIInterruptOverrideMetadata;
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class IOAPIC final : public IRQController {
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public:
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IOAPIC(ioapic_mmio_regs& regs, u32 gsi_base);
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virtual void enable(u8 number) override;
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virtual void disable(u8 number) override;
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virtual void hard_disable() override;
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virtual void eoi(u8 number) const override;
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virtual bool is_vector_enabled(u8 number) const override;
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virtual u16 get_isr() const override;
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virtual u16 get_irr() const override;
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virtual u32 get_gsi_base() const override { return m_gsi_base; }
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virtual const char* model() const override { return "IOAPIC"; };
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virtual IRQControllerType type() const override { return IRQControllerType::i82093AA; }
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private:
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void configure_redirection_entry(int index, u8 interrupt_vector, u8 delivery_mode, bool logical_destination, bool active_low, bool trigger_level_mode, bool masked, u8 destination) const;
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void reset_redirection_entry(int index) const;
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void map_interrupt_redirection(u8 interrupt_vector);
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void reset_all_redirection_entries() const;
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void mask_all_redirection_entries() const;
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void mask_redirection_entry(u8 index) const;
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void unmask_redirection_entry(u8 index) const;
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bool is_redirection_entry_masked(u8 index) const;
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u8 read_redirection_entry_vector(u8 index) const;
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int find_redirection_entry_by_vector(u8 vector) const;
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void configure_redirections() const;
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void write_register(u32 index, u32 value) const;
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u32 read_register(u32 index) const;
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virtual void initialize() override;
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void map_isa_interrupts();
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void map_pci_interrupts();
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void isa_identity_map(int index);
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ioapic_mmio_regs& m_physical_access_registers;
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u32 m_gsi_base;
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u8 m_id;
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u8 m_version;
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u32 m_redirection_entries;
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};
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}
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