mirror of
https://github.com/RGBCube/serenity
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aeef1c52bc
That code heavily relies on x86-specific instructions, and while other CPU architectures and platforms can have PCI IDE controllers, currently we don't support those, so this code is a special case which needs to be in the Arch/x86 directory. In the future it could be put back to the original place when we make it more generic and suitable for other platforms.
40 lines
1.1 KiB
C++
40 lines
1.1 KiB
C++
/*
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* Copyright (c) 2020-2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/OwnPtr.h>
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#include <AK/Types.h>
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#include <Kernel/Library/LockRefPtr.h>
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#include <Kernel/Storage/ATA/GenericIDE/Controller.h>
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#include <Kernel/Storage/StorageDevice.h>
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namespace Kernel {
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class AsyncBlockDeviceRequest;
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class PCIIDELegacyModeController final : public IDEController
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, public PCI::Device {
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public:
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static NonnullLockRefPtr<PCIIDELegacyModeController> initialize(PCI::DeviceIdentifier const&, bool force_pio);
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bool is_bus_master_capable() const;
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bool is_pci_native_mode_enabled() const;
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private:
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bool is_pci_native_mode_enabled_on_primary_channel() const;
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bool is_pci_native_mode_enabled_on_secondary_channel() const;
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PCIIDELegacyModeController(PCI::DeviceIdentifier const&, bool force_pio);
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LockRefPtr<StorageDevice> device_by_channel_and_position(u32 index) const;
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void initialize(bool force_pio);
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void detect_disks();
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// FIXME: Find a better way to get the ProgrammingInterface
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PCI::ProgrammingInterface m_prog_if;
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PCI::InterruptLine m_interrupt_line;
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};
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}
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