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https://github.com/RGBCube/serenity
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6d2c298b66
As there is no need for a Prekernel on aarch64, the Prekernel code was moved into Kernel itself. The functionality remains the same. SERENITY_KERNEL_AND_INITRD in run.sh specifies a kernel and an inital ramdisk to be used by the emulator. This is needed because aarch64 does not need a Prekernel and the other ones do.
98 lines
3.4 KiB
C++
98 lines
3.4 KiB
C++
/*
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* Copyright (c) 2021, Nico Weber <thakis@chromium.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/aarch64/GPIO.h>
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#include <Kernel/Arch/aarch64/MMIO.h>
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extern "C" void wait_cycles(int n);
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namespace Prekernel {
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// See BCM2835-ARM-Peripherals.pdf section "6 General Purpose I/O" or bcm2711-peripherals.pdf "Chapter 5. General Purpose I/O".
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// "6.1 Register View" / "5.2 Register View"
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struct PinData {
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u32 bits[2];
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u32 reserved;
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};
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struct GPIOControlRegisters {
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u32 function_select[6]; // Every u32 stores a 3-bit function code for 10 pins.
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u32 reserved;
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PinData output_set;
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PinData output_clear;
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PinData level;
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PinData event_detect_status;
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PinData rising_edge_detect_enable;
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PinData falling_edge_detect_enable;
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PinData high_detect_enable;
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PinData low_detect_enable;
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PinData async_rising_edge_detect_enable;
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PinData async_falling_edge_detect_enable;
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u32 pull_up_down_enable;
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PinData pull_up_down_enable_clock;
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u32 test;
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};
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GPIO::GPIO()
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: m_registers(MMIO::the().peripheral<GPIOControlRegisters>(0x20'0000))
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{
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}
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GPIO& GPIO::the()
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{
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static GPIO instance;
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return instance;
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}
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void GPIO::set_pin_function(unsigned pin_number, PinFunction function)
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{
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// pin_number must be <= 53. We can't VERIFY() that since this function runs too early to print assertion failures.
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unsigned function_select_index = pin_number / 10;
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unsigned function_select_bits_start = (pin_number % 10) * 3;
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u32 function_bits = m_registers->function_select[function_select_index];
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function_bits = (function_bits & ~(0b111 << function_select_bits_start)) | (static_cast<u32>(function) << function_select_bits_start);
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m_registers->function_select[function_select_index] = function_bits;
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}
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void GPIO::internal_enable_pins(u32 enable[2], PullUpDownState state)
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{
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// Section "GPIO Pull-up/down Clock Registers (GPPUDCLKn)":
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// The GPIO Pull-up/down Clock Registers control the actuation of internal pull-downs on
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// the respective GPIO pins. These registers must be used in conjunction with the GPPUD
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// register to effect GPIO Pull-up/down changes. The following sequence of events is
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// required:
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// 1. Write to GPPUD to set the required control signal (i.e. Pull-up or Pull-Down or neither
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// to remove the current Pull-up/down)
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m_registers->pull_up_down_enable = static_cast<u32>(state);
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// 2. Wait 150 cycles – this provides the required set-up time for the control signal
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wait_cycles(150);
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// 3. Write to GPPUDCLK0/1 to clock the control signal into the GPIO pads you wish to
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// modify – NOTE only the pads which receive a clock will be modified, all others will
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// retain their previous state.
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m_registers->pull_up_down_enable_clock.bits[0] = enable[0];
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m_registers->pull_up_down_enable_clock.bits[1] = enable[1];
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// 4. Wait 150 cycles – this provides the required hold time for the control signal
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wait_cycles(150);
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// 5. Write to GPPUD to remove the control signal
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m_registers->pull_up_down_enable = 0;
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// 6. Write to GPPUDCLK0/1 to remove the clock
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m_registers->pull_up_down_enable_clock.bits[0] = 0;
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m_registers->pull_up_down_enable_clock.bits[1] = 0;
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// bcm2711-peripherals.pdf documents GPIO_PUP_PDN_CNTRL_REG[4] registers that store 2 bits state per register, similar to function_select.
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// I don't know if the RPi3 has that already, so this uses the old BCM2835 approach for now.
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}
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}
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