mirror of
https://github.com/RGBCube/serenity
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61 lines
1.5 KiB
C++
61 lines
1.5 KiB
C++
/*
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* Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Types.h>
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namespace Kernel {
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static constexpr size_t vmware_svga_version_2_id = (0x900000UL << 8 | (2));
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enum class VMWareDisplayRegistersOffset {
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ID = 0,
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ENABLE = 1,
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WIDTH = 2,
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HEIGHT = 3,
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MAX_WIDTH = 4,
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MAX_HEIGHT = 5,
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DEPTH = 6,
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BITS_PER_PIXEL = 7, /* Current bpp in the guest */
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PSEUDOCOLOR = 8,
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RED_MASK = 9,
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GREEN_MASK = 10,
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BLUE_MASK = 11,
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BYTES_PER_LINE = 12,
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FB_OFFSET = 14,
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VRAM_SIZE = 15,
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FB_SIZE = 16,
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CAPABILITIES = 17,
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MEM_SIZE = 19,
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CONFIG_DONE = 20, /* Set when memory area configured */
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SYNC = 21, /* See "FIFO Synchronization Registers" */
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BUSY = 22, /* See "FIFO Synchronization Registers" */
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SCRATCH_SIZE = 29, /* Number of scratch registers */
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MEM_REGS = 30, /* Number of FIFO registers */
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PITCHLOCK = 32, /* Fixed pitch for all modes */
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IRQMASK = 33, /* Interrupt mask */
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GMR_ID = 41,
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GMR_DESCRIPTOR = 42,
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GMR_MAX_IDS = 43,
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GMR_MAX_DESCRIPTOR_LENGTH = 44,
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TRACES = 45, /* Enable trace-based updates even when FIFO is on */
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GMRS_MAX_PAGES = 46, /* Maximum number of 4KB pages for all GMRs */
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MEMORY_SIZE = 47, /* Total dedicated device memory excluding FIFO */
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};
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struct [[gnu::packed]] VMWareDisplayFIFORegisters {
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u32 start;
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u32 size;
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u32 next_command;
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u32 stop;
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u32 commands[];
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};
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}
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