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serenity/Kernel/Arch/aarch64/RPi/MiniUART.cpp
Daniel Bertalan c460b84ebe Kernel: Add character device driver for the RPi "mini UART" (UART1)
While the PL011-based UART0 is currently reserved for the kernel
console, UART1 is free to be exposed to the userspace as `/dev/ttyS0`.
This will be used as the stdout of `run-tests-and-shutdown.sh` when
testing the AArch64 kernel.
2023-05-17 01:32:43 -06:00

135 lines
3.5 KiB
C++

/*
* Copyright (c) 2023, Daniel Bertalan <dani@danielbertalan.dev>
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#include <Kernel/Arch/aarch64/RPi/GPIO.h>
#include <Kernel/Arch/aarch64/RPi/MMIO.h>
#include <Kernel/Arch/aarch64/RPi/MiniUART.h>
#include <Kernel/Arch/aarch64/RPi/Timer.h>
namespace Kernel::RPi {
// bcm2711-peripherals.pdf "Table 2. Auxiliary peripherals Address Map"
struct MiniUARTRegisters {
u32 io_data;
u32 interrupt_enable;
u32 interrupt_identify;
u32 line_control;
u32 modem_control;
u32 line_status;
u32 modem_status;
u32 extra_control;
u32 extra_status;
u32 baud_rate;
};
// "Table 4. AUX_ENABLES Register"
enum AuxControlBits {
MiniUARTEnable = 1,
SPI1Enable = 1 << 1,
SPI2Enable = 1 << 2,
};
// "Table 8. AUX_MU_LCR_REG Register"
enum LineControl {
DataSize8Bits = 1,
Break = 1 << 6,
DLABAccess = 1 << 7,
};
// "Table 13. AUX_MU_CNTL_REG Register"
enum ExtraControl {
ReceiverEnable = 1,
TransmitterEnable = 2,
};
// "Table 10. AUX_MU_LSR_REG Register"
enum LineStatus {
DataReady = 0,
ReceiverOverrun = 1,
TransmitterEmpty = 1 << 5,
TransmitterIdle = 1 << 6,
};
constexpr FlatPtr AUX_ENABLES = 0x21'5000;
UNMAP_AFTER_INIT ErrorOr<NonnullLockRefPtr<MiniUART>> MiniUART::create()
{
return DeviceManagement::try_create_device<MiniUART>();
}
UNMAP_AFTER_INIT MiniUART::MiniUART()
: CharacterDevice(4, 64)
, m_registers(MMIO::the().peripheral<MiniUARTRegisters>(0x21'5040))
{
auto& gpio = GPIO::the();
gpio.set_pin_function(40, GPIO::PinFunction::Alternate5); // TXD1
gpio.set_pin_function(41, GPIO::PinFunction::Alternate5); // RXD1
gpio.set_pin_pull_up_down_state(Array { 40, 41 }, GPIO::PullUpDownState::Disable);
// The mini UART peripheral needs to be enabled before we can configure it.
MMIO::the().write(AUX_ENABLES, MMIO::the().read(AUX_ENABLES) | MiniUARTEnable);
set_baud_rate(115'200);
m_registers->line_control = DataSize8Bits;
m_registers->extra_control = ReceiverEnable | TransmitterEnable;
}
UNMAP_AFTER_INIT MiniUART::~MiniUART() = default;
bool MiniUART::can_read(OpenFileDescription const&, u64) const
{
return false;
}
ErrorOr<size_t> MiniUART::read(OpenFileDescription&, u64, UserOrKernelBuffer&, size_t)
{
// FIXME: Implement reading from the MiniUART.
return ENOTIMPL;
}
bool MiniUART::can_write(OpenFileDescription const&, u64) const
{
return (m_registers->line_status & TransmitterEmpty) != 0;
}
ErrorOr<size_t> MiniUART::write(Kernel::OpenFileDescription& description, u64, Kernel::UserOrKernelBuffer const& buffer, size_t size)
{
if (!size)
return 0;
SpinlockLocker lock(m_serial_lock);
if (!can_write(description, size))
return EAGAIN;
return buffer.read_buffered<128>(size, [&](ReadonlyBytes bytes) {
for (const auto& byte : bytes)
put_char(byte);
return bytes.size();
});
}
void MiniUART::put_char(u8 ch)
{
while ((m_registers->line_status & TransmitterEmpty) == 0)
;
if (ch == '\n' && !m_last_put_char_was_carriage_return)
m_registers->io_data = '\r';
m_registers->io_data = ch;
m_last_put_char_was_carriage_return = (ch == '\r');
}
// The mini UAT's clock is generated from the system (VideoCore) clock.
// See section "2.2.1. Mini UART implementation details"
void MiniUART::set_baud_rate(u32 baud_rate)
{
auto system_clock = Timer::get_clock_rate(Timer::ClockID::V3D);
m_registers->baud_rate = system_clock / (8 * baud_rate) - 1;
}
}