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https://github.com/RGBCube/serenity
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9ee098b119
Like the HID, Audio and Storage subsystem, the Graphics subsystem (which
handles GPUs technically) exposes unix device files (typically in /dev).
To ensure consistency across the repository, move all related files to a
new directory under Kernel/Devices called "GPU".
Also remove the redundant "GPU" word from the VirtIO driver directory,
and the word "Graphics" from GraphicsManagement.{h,cpp} filenames.
42 lines
1.7 KiB
C++
42 lines
1.7 KiB
C++
/*
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* Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/RefPtr.h>
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#include <AK/Try.h>
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#include <AK/Types.h>
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#include <Kernel/Devices/GPU/Intel/Transcoder/DisplayTranscoder.h>
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namespace Kernel {
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class IntelDisplayConnectorGroup;
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class IntelAnalogDisplayTranscoder final : public IntelDisplayTranscoder {
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public:
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static ErrorOr<NonnullOwnPtr<IntelAnalogDisplayTranscoder>> create_with_physical_addresses(PhysicalAddress transcoder_registers_start_address,
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PhysicalAddress pipe_registers_start_address, PhysicalAddress dpll_registers_start_address, PhysicalAddress dpll_control_registers_start_address);
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virtual ErrorOr<void> set_dpll_settings(Badge<IntelDisplayConnectorGroup>, IntelGraphics::PLLSettings const& settings, size_t dac_multiplier) override;
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virtual ErrorOr<void> enable_dpll_without_vga(Badge<IntelDisplayConnectorGroup>) override;
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virtual ErrorOr<void> disable_dpll(Badge<IntelDisplayConnectorGroup>) override;
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private:
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struct [[gnu::packed]] DPLLRegisters {
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u32 divisor_a0;
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u32 divisor_a1;
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};
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struct [[gnu::packed]] DPLLControlRegisters {
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u32 control;
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u32 padding; // On Gen4, this is the control register of DPLL B, don't touch this
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u32 multiplier;
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};
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IntelAnalogDisplayTranscoder(Memory::TypedMapping<TranscoderRegisters volatile>, Memory::TypedMapping<PipeRegisters volatile>, Memory::TypedMapping<DPLLRegisters volatile>, Memory::TypedMapping<DPLLControlRegisters volatile>);
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Memory::TypedMapping<DPLLRegisters volatile> m_dpll_registers;
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Memory::TypedMapping<DPLLControlRegisters volatile> m_dpll_control_registers;
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};
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}
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