mirror of
https://github.com/RGBCube/serenity
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247109cee6
Until now the kernel was always executing with SP_EL0, as this made the initial dropping to EL1 a bit easier. This commit changes this behaviour to use the corresponding SP_ELx for each exception level. To make sure that the execution of the C++ code can continue, the current stack pointer is copied into the corresponding SP_ELx just before dropping an exception level.
39 lines
877 B
ArmAsm
39 lines
877 B
ArmAsm
/*
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* Copyright (c) 2021, Nico Weber <thakis@chromium.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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// In a specially-named text section so that the linker script can put it first in .text.
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.section ".text.first"
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.global start
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.type start, @function
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start:
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// Let only core 0 continue, put other cores to sleep.
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mrs x13, MPIDR_EL1
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and x13, x13, 0xff
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cbnz x13, halt
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// Let stack start before .text for now.
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// 512 kiB (0x80000) of stack are probably not sufficient, especially once we give the other cores some stack too,
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// but for now it's ok.
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adrp x14, start
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add x14, x14, :lo12:start
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mov sp, x14
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// Clear BSS.
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adrp x14, start_of_bss
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add x14, x14, :lo12:start_of_bss
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ldr x15, =size_of_bss_divided_by_8
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Lbss_clear_loop:
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str xzr, [x14], #8
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subs x15, x15, #1
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bne Lbss_clear_loop
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b pre_init
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halt:
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msr daifset, #2
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wfi
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b halt
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