mirror of
https://github.com/RGBCube/serenity
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230 lines
6.2 KiB
ArmAsm
230 lines
6.2 KiB
ArmAsm
#include <Kernel/Sections.h>
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.section .text
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.global gdt64ptr
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gdt64ptr:
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.quad 0
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.global code64_sel
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code64_sel:
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.short 0
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/*
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The apic_ap_start function will be loaded to P0x00008000 where the APIC
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will boot the AP from in real mode. This code also contains space for
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special variables that *must* remain here. When initializing the APIC,
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the code here gets copied to P0x00008000, the variables in here get
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populated and then the boot of the APs will be triggered.
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Having the variables here allows us to access them from real mode. Also, the
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code here avoids the need for relocation entries.
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Basically, the variables between apic_ap_start and end_apic_ap_start
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*MUST* remain here and cannot be moved into a .bss or any other location.
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*/
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.global apic_ap_start
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.type apic_ap_start, @function
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.align 8
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apic_ap_start:
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.code16
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cli
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jmp $0x800, $(1f - apic_ap_start) /* avoid relocation entries */
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1:
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mov %cs, %ax
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mov %ax, %ds
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xor %ax, %ax
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mov %ax, %sp
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/* load the first temporary gdt */
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lgdt (ap_cpu_gdtr_initial - apic_ap_start)
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/* enable PM */
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movl %cr0, %eax
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orl $1, %eax
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movl %eax, %cr0
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ljmpl $8, $(apic_ap_start32 - apic_ap_start + 0x8000)
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apic_ap_start32:
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.code32
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mov $0x10, %ax
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mov %ax, %ss
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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movl $0x8000, %ebp
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/* generate a unique ap cpu id (0 means 1st ap, not bsp!) */
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xorl %eax, %eax
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incl %eax
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lock; xaddl %eax, (ap_cpu_id - apic_ap_start)(%ebp) /* avoid relocation entries */
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movl %eax, %esi
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/* check if we support NX and enable it if we do */
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movl $0x80000001, %eax
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cpuid
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testl $0x100000, %edx
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je (1f - apic_ap_start + 0x8000)
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/* turn on IA32_EFER.NXE */
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movl $0xc0000080, %ecx
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rdmsr
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orl $0x800, %eax
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wrmsr
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1:
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/* load the bsp's cr3 value */
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movl (ap_cpu_init_cr3 - apic_ap_start)(%ebp), %eax
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movl %eax, %cr3
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/* Enter Long-mode! ref(https://wiki.osdev.org/Setting_Up_Long_Mode)*/
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mov $0xC0000080, %ecx /* Set the C-register to 0xC0000080, which is the EFER MSR.*/
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rdmsr /* Read from the model-specific register.*/
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or $(1 << 8), %eax /* Set the LM-bit which is the 9th bit (bit 8).*/
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wrmsr /* Write to the model-specific register.*/
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/* enable PAE + PSE */
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movl %cr4, %eax
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orl $0x60, %eax
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movl %eax, %cr4
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/* enable PG */
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movl %cr0, %eax
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orl $0x80000000, %eax
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movl %eax, %cr0
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/* load the temporary 64-bit gdt from boot that points above 3GB */
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lgdt (ap_cpu_gdt64ptr - apic_ap_start + 0x8000)
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/* Jump into our identity mapped area, stay in low memory for now.
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We need to fully enable 64 bit mode before we can adjust rsp and rip
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to values higher than 4GB */
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ljmpl $(ap_cpu_gdt64code - ap_cpu_gdt64), $(apic_ap_start64 - apic_ap_start + 0x8000)
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.code64
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apic_ap_start64:
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movq (ap_cpu_kernel_map_base - apic_ap_start)(%rbp), %rbp
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addq $0x8000, %rbp
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/* find our allocated stack based on the generated id */
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movq (ap_cpu_init_stacks - apic_ap_start)(%rbp, %rsi, 8), %rsp
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/* Now jump from our identity mapped area into high memory */
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movq $(1f - apic_ap_start), %rax
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addq %rbp, %rax
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jmp *%rax
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1:
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mov $0, %ax
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mov %ax, %ss
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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/* flush the TLB */
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movq %cr3, %rax
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movq %rax, %cr3
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/* now load the final gdt and idt from the identity mapped area */
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movq (ap_cpu_gdtr - apic_ap_start)(%rbp), %rax
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lgdt (%rax)
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movq (ap_cpu_idtr - apic_ap_start)(%rbp), %rax
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lidt (%rax)
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/* set same cr0 and cr4 values as the BSP */
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movq (ap_cpu_init_cr0 - apic_ap_start)(%rbp), %rax
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movq %rax, %cr0
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movq (ap_cpu_init_cr4 - apic_ap_start)(%rbp), %rax
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movq %rax, %cr4
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/* Save the cpu id into rdi (first argument), 0 representing the bsp */
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movq %rsi, %rdi
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incq %rdi
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/* Save the Processor pointer this CPU is going to use into rsi (second argument) */
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movq (ap_cpu_init_processor_info_array - apic_ap_start)(%rbp), %rax
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movq 0(%rax, %rsi, 8), %rsi
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/* Get the entry function */
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movq (ap_cpu_kernel_entry_function - apic_ap_start)(%rbp), %r10
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movq %rsp, %rbp
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cld
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/* We are in identity mapped P0x8000 and the BSP will unload this code
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once all APs are initialized, so call the entry function and return to our
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infinite loop if it ever were to return. */
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call *%r10
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loop:
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hlt
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jmp loop
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.align 4
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.global apic_ap_start_size
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apic_ap_start_size:
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.2byte end_apic_ap_start - apic_ap_start
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.align 4
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ap_cpu_id:
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.4byte 0x0
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ap_cpu_gdt:
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/* null */
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.8byte 0x0
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/* code */
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.4byte 0x0000FFFF
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.4byte 0x00cf9a00
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/* data */
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.4byte 0x0000FFFF
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.4byte 0x00cf9200
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ap_cpu_gdt_end:
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ap_cpu_gdtr_initial:
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.2byte ap_cpu_gdt_end - ap_cpu_gdt - 1
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.4byte (ap_cpu_gdt - apic_ap_start) + 0x8000
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.align 8
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.global ap_cpu_gdtr
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ap_cpu_gdtr:
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.8byte 0x0 /* will be set at runtime */
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.global ap_cpu_idtr
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ap_cpu_idtr:
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.8byte 0x0 /* will be set at runtime */
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.global ap_cpu_init_cr0
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ap_cpu_init_cr0:
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.8byte 0x0 /* will be set at runtime */
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.global ap_cpu_init_cr3
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ap_cpu_init_cr3:
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.8byte 0x0 /* will be set at runtime */
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.global ap_cpu_init_cr4
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ap_cpu_init_cr4:
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.8byte 0x0 /* will be set at runtime */
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.global ap_cpu_gdt64
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ap_cpu_gdt64:
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.8byte 0x0
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.global ap_cpu_gdt64code
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ap_cpu_gdt64code:
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.4byte 0xffff
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.4byte 0xaf9a00
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.global ap_cpu_gdt64data
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ap_cpu_gdt64data:
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.4byte 0xffff
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.4byte 0xaf9200
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.global ap_cpu_gdt64ptr
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ap_cpu_gdt64ptr:
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.2byte ap_cpu_gdt64ptr - ap_cpu_gdt64 - 1
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.8byte (ap_cpu_gdt64 - apic_ap_start) + 0x8000
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.align 8
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.global ap_cpu_kernel_entry_function
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ap_cpu_kernel_entry_function:
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.8byte 0x0 /* will be set at runtime */
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.global ap_cpu_kernel_map_base
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ap_cpu_kernel_map_base:
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.8byte 0x0 /* will be set at runtime */
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.global ap_cpu_init_processor_info_array
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ap_cpu_init_processor_info_array:
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.8byte 0x0 /* will be set at runtime */
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.global ap_cpu_init_stacks
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ap_cpu_init_stacks:
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/* array of allocated stack pointers */
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/* NOTE: ap_cpu_init_stacks must be the last variable before
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end_apic_ap_start! */
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.set end_apic_ap_start, .
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