mirror of
https://github.com/RGBCube/serenity
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e362b56b4f
The kernel and its static data structures are no longer identity-mapped in the bottom 8MB of the address space, but instead move above 3GB. The first 8MB above 3GB are pseudo-identity-mapped to the bottom 8MB of the physical address space. But things don't have to stay this way! Thanks to Jesse who made an earlier attempt at this, it was really easy to get device drivers working once the page tables were in place! :^) Fixes #734.
76 lines
2.2 KiB
C++
76 lines
2.2 KiB
C++
//
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// Parallel ATA (PATA) controller driver
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//
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// This driver describes a logical PATA Channel. Each channel can connect up to 2
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// IDE Hard Disk Drives. The drives themselves can be either the master drive (hd0)
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// or the slave drive (hd1).
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//
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// More information about the ATA spec for PATA can be found here:
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// ftp://ftp.seagate.com/acrobat/reference/111-1c.pdf
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//
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#pragma once
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#include <AK/OwnPtr.h>
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#include <AK/RefPtr.h>
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#include <Kernel/IRQHandler.h>
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#include <Kernel/Lock.h>
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#include <Kernel/PCI/Access.h>
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#include <Kernel/VM/PhysicalAddress.h>
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#include <Kernel/VM/PhysicalPage.h>
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#include <Kernel/WaitQueue.h>
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struct PhysicalRegionDescriptor {
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PhysicalAddress offset;
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u16 size { 0 };
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u16 end_of_table { 0 };
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};
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class PATADiskDevice;
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class PATAChannel final : public IRQHandler {
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friend class PATADiskDevice;
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AK_MAKE_ETERNAL
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public:
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enum class ChannelType : u8 {
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Primary,
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Secondary
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};
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public:
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static OwnPtr<PATAChannel> create(ChannelType type, bool force_pio);
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PATAChannel(ChannelType type, bool force_pio);
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virtual ~PATAChannel() override;
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RefPtr<PATADiskDevice> master_device() { return m_master; };
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RefPtr<PATADiskDevice> slave_device() { return m_slave; };
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private:
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//^ IRQHandler
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virtual void handle_irq() override;
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void initialize(bool force_pio);
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void detect_disks();
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void wait_for_irq();
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bool ata_read_sectors_with_dma(u32, u16, u8*, bool);
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bool ata_write_sectors_with_dma(u32, u16, const u8*, bool);
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bool ata_read_sectors(u32, u16, u8*, bool);
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bool ata_write_sectors(u32, u16, const u8*, bool);
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// Data members
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u8 m_channel_number { 0 }; // Channel number. 0 = master, 1 = slave
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u16 m_io_base { 0x1F0 };
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u16 m_control_base { 0 };
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volatile u8 m_device_error { 0 };
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WaitQueue m_irq_queue;
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PCI::Address m_pci_address;
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PhysicalRegionDescriptor& prdt() { return *reinterpret_cast<PhysicalRegionDescriptor*>(m_prdt_page->paddr().offset(0xc0000000).as_ptr()); }
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RefPtr<PhysicalPage> m_prdt_page;
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RefPtr<PhysicalPage> m_dma_buffer_page;
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u16 m_bus_master_base { 0 };
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Lockable<bool> m_dma_enabled;
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RefPtr<PATADiskDevice> m_master;
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RefPtr<PATADiskDevice> m_slave;
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};
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