mirror of
https://github.com/RGBCube/serenity
synced 2025-10-31 13:12:46 +00:00
334 lines
7.4 KiB
ArmAsm
334 lines
7.4 KiB
ArmAsm
#define _BOOTLOADER
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#include <AK/Platform.h>
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#include <Kernel/Sections.h>
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.code32
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.section .stack, "aw", @nobits
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stack_bottom:
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.skip 32768
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stack_top:
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.global kernel_cmdline
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kernel_cmdline:
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.skip 4096
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.section .page_tables, "aw", @nobits
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.align 4096
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#if ARCH(X86_64)
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.global boot_pml4t
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boot_pml4t:
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.skip 4096
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#endif
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.global boot_pdpt
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boot_pdpt:
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.skip 4096
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.global boot_pd0
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boot_pd0:
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.skip 4096
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.global boot_pd3
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boot_pd3:
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.skip 4096
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.global boot_pd0_pt0
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boot_pd0_pt0:
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.skip 4096 * 4
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.global boot_pd3_pts
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boot_pd3_pts:
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.skip 4096 * 16
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.global boot_pd3_pt1023
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boot_pd3_pt1023:
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.skip 4096
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.section .boot_text, "ax"
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.global start
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.type start, @function
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.extern init
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.type init, @function
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.extern multiboot_info_ptr
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.type multiboot_info_ptr, @object
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/*
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construct the following (64-bit PML4T) page table layout:
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(the PML4T part is not used for 32-bit x86)
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pml4t:
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0: pdpt (0-512GB)
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pdpt
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0: boot_pd0 (0-1GB)
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1: n/a (1-2GB)
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2: n/a (2-3GB)
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3: boot_pd3 (3-4GB)
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boot_pd0 : 512 pde's
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0: boot_pd0_pt0 (0-2MB) (id 512 4KB pages)
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boot_pd3 : 512 pde's
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0: boot_pd3_pts[0] (3072-3074MB) (pseudo 512 4KB pages)
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1: boot_pd3_pts[1] (3074-3076MB) (pseudo 512 4KB pages)
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2: boot_pd3_pts[2] (3076-3078MB) (pseudo 512 4KB pages)
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3: boot_pd3_pts[3] (3078-3080MB) (pseudo 512 4KB pages)
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4: boot_pd3_pts[4] (3080-3082MB) (pseudo 512 4KB pages)
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5: boot_pd3_pts[5] (3082-3084MB) (pseudo 512 4KB pages)
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6: boot_pd3_pts[6] (3084-3086MB) (pseudo 512 4KB pages)
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7: boot_pd3_pts[7] (3086-3088MB) (pseudo 512 4KB pages)
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8: boot_pd3_pts[8] (3088-3090MB) (pseudo 512 4KB pages)
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9: boot_pd3_pts[9] (3090-3076MB) (pseudo 512 4KB pages)
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10: boot_pd3_pts[10] (3092-3094MB) (pseudo 512 4KB pages)
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11: boot_pd3_pts[11] (3094-3096MB) (pseudo 512 4KB pages)
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12: boot_pd3_pts[12] (3096-3098MB) (pseudo 512 4KB pages)
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13: boot_pd3_pts[13] (3098-3100MB) (pseudo 512 4KB pages)
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14: boot_pd3_pts[14] (3100-3102MB) (pseudo 512 4KB pages)
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15: boot_pd3_pts[15] (3102-3104MB) (pseudo 512 4KB pages)
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16: boot_pd3_pt1023 (4094-4096MB) (for page table mappings)
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the 9 page tables each contain 512 pte's that map individual 4KB pages
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*/
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#if ARCH(X86_64)
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gdt64:
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.quad 0
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gdt64code:
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.quad (1<<43) | (1<<44) | (1<<47) | (1<<53) /* executable, code segment, present, 64-bit */
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.global gdt64ptr
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gdt64ptr:
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.short . - gdt64 - 1
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.quad gdt64
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.global code64_sel
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.set code64_sel, gdt64code - gdt64
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#endif
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start:
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cli
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cld
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#if ARCH(X86_64)
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/* test for long mode presence, save the most important registers from corruption */
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pushl %eax
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pushl %edx
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pushl %ebx
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movl $0x80000001, %eax
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cpuid
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testl $(1 << 29), %edx /* Test if the LM-bit, which is bit 29, is set in the edx register. */
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jnz continue /* If LM-bit is not enabled, there is no long mode. */
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hlt
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continue:
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/* restore the pushed registers */
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popl %ebx
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popl %edx
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popl %eax
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#endif
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/* We don't know where the bootloader might have put the command line.
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* It might be at an inconvenient location that we're not about to map,
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* so let's just copy it to a convenient location while we have the whole
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* memory space identity-mapped anyway. :^)
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*/
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movl %ebx, %esi
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addl $16, %esi
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movl (%esi), %esi
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movl $1024, %ecx
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movl $(kernel_cmdline - KERNEL_BASE), %edi
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rep movsl
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#if ARCH(X86_64)
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/* clear pml4t */
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movl $(boot_pml4t - KERNEL_BASE), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* set up pml4t[0] */
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movl $(boot_pml4t - KERNEL_BASE), %edi
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movl $(boot_pdpt - KERNEL_BASE), 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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#endif
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/* clear pdpt */
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movl $(boot_pdpt - KERNEL_BASE), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* set up pdpt[0] and pdpt[3] */
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movl $(boot_pdpt - KERNEL_BASE), %edi
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#if ARCH(X86_64)
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movl $((boot_pd0 - KERNEL_BASE) + 3), 0(%edi)
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movl $((boot_pd3 - KERNEL_BASE) + 3), 24(%edi)
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#else
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movl $((boot_pd0 - KERNEL_BASE) + 1), 0(%edi)
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movl $((boot_pd3 - KERNEL_BASE) + 1), 24(%edi)
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#endif
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/* clear pd0 */
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movl $(boot_pd0 - KERNEL_BASE), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd3 */
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movl $(boot_pd3 - KERNEL_BASE), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd0's pt's */
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movl $(boot_pd0_pt0 - KERNEL_BASE), %edi
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movl $(1024 * 4), %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd3's pt's */
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movl $(boot_pd3_pts - KERNEL_BASE), %edi
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movl $(1024 * 17), %ecx
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xorl %eax, %eax
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rep stosl
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/* add boot_pd0_pt0 to boot_pd0 */
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movl $(boot_pd0 - KERNEL_BASE), %edi
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movl $(boot_pd0_pt0 - KERNEL_BASE), %eax
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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/* add boot_pd3_pts to boot_pd3 */
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movl $16, %ecx
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movl $(boot_pd3 - KERNEL_BASE), %edi
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movl $(boot_pd3_pts - KERNEL_BASE), %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* identity map the 0 to 2MB range */
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movl $512, %ecx
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movl $(boot_pd0_pt0 - KERNEL_BASE), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* pseudo identity map the 3072-3102MB range */
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movl $(512 * 16), %ecx
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movl $(boot_pd3_pts - KERNEL_BASE), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* create an empty page table for the top 2MB at the 4GB mark */
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movl $(boot_pd3 - KERNEL_BASE), %edi
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movl $(boot_pd3_pt1023 - KERNEL_BASE), 4088(%edi)
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orl $0x3, 4088(%edi)
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movl $0, 4092(%edi)
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#if ARCH(X86_64)
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/* point CR3 to PML4T */
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movl $(boot_pml4t - KERNEL_BASE), %eax
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#else
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/* point CR3 to PDPT */
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movl $(boot_pdpt - KERNEL_BASE), %eax
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#endif
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movl %eax, %cr3
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/* enable PAE + PSE */
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movl %cr4, %eax
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orl $0x60, %eax
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movl %eax, %cr4
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#if ARCH(X86_64)
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1:
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/* Enter Long-mode! ref(https://wiki.osdev.org/Setting_Up_Long_Mode)*/
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mov $0xC0000080, %ecx /* Set the C-register to 0xC0000080, which is the EFER MSR.*/
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rdmsr /* Read from the model-specific register.*/
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or $(1 << 8), %eax /* Set the LM-bit which is the 9th bit (bit 8).*/
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wrmsr /* Write to the model-specific register.*/
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#endif
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/* enable PG */
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movl %cr0, %eax
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orl $0x80000000, %eax
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movl %eax, %cr0
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/* set up stack */
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mov $stack_top, %esp
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and $-16, %esp
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/* jmp to an address above the 3GB mark */
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movl $1f,%eax
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jmp *%eax
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1:
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movl %cr3, %eax
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movl %eax, %cr3
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/* unmap the 0-1MB range, which isn't used after jmp-ing up here */
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movl $256, %ecx
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movl $(boot_pd0_pt0 - KERNEL_BASE), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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addl $8, %edi
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loop 1b
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/* jump into C++ land */
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addl $KERNEL_BASE, %ebx
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movl %ebx, multiboot_info_ptr
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#if ARCH(X86_64)
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/* Now we are in 32-bit compatibility mode, We still need to load a 64-bit GDT */
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lgdt gdt64ptr
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ljmpl $code64_sel, $1f
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.code64
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1:
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mov $0, %ax
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mov %ax, %ss
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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#endif
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call init
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#if ARCH(X86_64)
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add $4, %rsp
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#else
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add $4, %esp
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#endif
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cli
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loop:
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hlt
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jmp loop
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