mirror of
https://github.com/RGBCube/serenity
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e99fafb683
Add a basic NVMe driver support to serenity based on NVMe spec 1.4. The driver can support multiple NVMe drives (subsystems). But in a NVMe drive, the driver can support one controller with multiple namespaces. Each core will get a separate NVMe Queue. As the system lacks MSI support, PIN based interrupts are used for IO. Tested the NVMe support by replacing IDE driver with the NVMe driver :^)
81 lines
2.8 KiB
C++
81 lines
2.8 KiB
C++
/*
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* Copyright (c) 2021, Pankaj R <pankydev8@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/NonnullRefPtrVector.h>
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#include <AK/OwnPtr.h>
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#include <AK/RefCounted.h>
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#include <AK/RefPtr.h>
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#include <AK/Types.h>
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#include <Kernel/Bus/PCI/Device.h>
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#include <Kernel/Interrupts/IRQHandler.h>
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#include <Kernel/Locking/Spinlock.h>
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#include <Kernel/Memory/MemoryManager.h>
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#include <Kernel/Memory/TypedMapping.h>
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#include <Kernel/Storage/NVMe/NVMeDefinitions.h>
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namespace Kernel {
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struct DoorbellRegister {
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u32 sq_tail;
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u32 cq_head;
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};
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class AsyncBlockDeviceRequest;
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class NVMeQueue : public IRQHandler
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, public RefCounted<NVMeQueue> {
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public:
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static ErrorOr<NonnullRefPtr<NVMeQueue>> try_create(u16 qid, u8 irq, u32 q_depth, OwnPtr<Memory::Region> cq_dma_region, NonnullRefPtrVector<Memory::PhysicalPage> cq_dma_page, OwnPtr<Memory::Region> sq_dma_region, NonnullRefPtrVector<Memory::PhysicalPage> sq_dma_page, Memory::TypedMapping<DoorbellRegister> db_regs);
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ErrorOr<void> create();
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explicit NVMeQueue(u16 qid, u8 irq, u32 q_depth, OwnPtr<Memory::Region> cq_dma_region, NonnullRefPtrVector<Memory::PhysicalPage> cq_dma_page, OwnPtr<Memory::Region> sq_dma_region, NonnullRefPtrVector<Memory::PhysicalPage> sq_dma_page, Memory::TypedMapping<DoorbellRegister> db_regs);
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bool is_admin_queue() { return m_admin_queue; };
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bool handle_irq(const RegisterState&) override;
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void submit_sqe(struct NVMeSubmission&);
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u16 submit_sync_sqe(struct NVMeSubmission&);
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void read(AsyncBlockDeviceRequest& request, u16 nsid, u64 index, u32 count);
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void write(AsyncBlockDeviceRequest& request, u16 nsid, u64 index, u32 count);
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void enable_interrupts() { enable_irq(); };
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void disable_interrupts() { disable_irq(); };
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private:
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bool cqe_available();
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void update_cqe_head();
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void complete_current_request(u16 status);
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void update_cq_doorbell()
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{
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m_db_regs->cq_head = m_cq_head;
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}
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void update_sq_doorbell()
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{
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m_db_regs->sq_tail = m_sq_tail;
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}
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private:
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u16 m_qid {};
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u8 m_cq_valid_phase { 1 };
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u16 m_sq_tail {};
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u16 m_prev_sq_tail {};
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u16 m_cq_head {};
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bool m_admin_queue { false };
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u8 m_irq {};
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u32 m_qdepth {};
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Spinlock m_cq_lock { LockRank::Interrupts };
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Spinlock m_sq_lock { LockRank::Interrupts };
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OwnPtr<Memory::Region> m_cq_dma_region;
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NonnullRefPtrVector<Memory::PhysicalPage> m_cq_dma_page;
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Span<NVMeSubmission> m_sqe_array;
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OwnPtr<Memory::Region> m_sq_dma_region;
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NonnullRefPtrVector<Memory::PhysicalPage> m_sq_dma_page;
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Span<NVMeCompletion> m_cqe_array;
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OwnPtr<Memory::Region> m_rw_dma_region;
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Memory::TypedMapping<DoorbellRegister> m_db_regs;
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RefPtr<Memory::PhysicalPage> m_rw_dma_page;
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Spinlock m_request_lock;
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RefPtr<AsyncBlockDeviceRequest> m_current_request;
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};
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}
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