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https://github.com/RGBCube/serenity
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f510c0ba04
The AHCI code doesn't rely on x86 IO at all as it only uses memory mapped IO so we can simply remove the header. We also simply don't use x86 IO in the Intel graphics driver, so we can simply remove the include of the x86 IO header there too. Everything else was a bunch of stale includes to the x86 IO header and are actually not necessary, so let's remove them to make it easier to compile non-x86 Kernel builds.
85 lines
3.5 KiB
C++
85 lines
3.5 KiB
C++
/*
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* Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/ByteReader.h>
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#include <Kernel/Bus/PCI/API.h>
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#include <Kernel/Bus/PCI/Access.h>
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#include <Kernel/Bus/PCI/Controller/VolumeManagementDevice.h>
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namespace Kernel::PCI {
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static Atomic<u32> s_vmd_pci_domain_number = 0x10000;
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NonnullOwnPtr<VolumeManagementDevice> VolumeManagementDevice::must_create(PCI::DeviceIdentifier const& device_identifier)
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{
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u8 start_bus = 0;
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switch ((PCI::read16(device_identifier.address(), static_cast<PCI::RegisterOffset>(0x44)) >> 8) & 0x3) {
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case 0:
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break;
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case 1:
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start_bus = 128;
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break;
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case 2:
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start_bus = 224;
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break;
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default:
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dbgln("VMD @ {}: Unknown bus offset option was set to {}", device_identifier.address(),
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((PCI::read16(device_identifier.address(), static_cast<PCI::RegisterOffset>(0x44)) >> 8) & 0x3));
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VERIFY_NOT_REACHED();
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}
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// FIXME: The end bus might not be 255, so we actually need to check it with the
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// resource size of BAR0.
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dbgln("VMD Host bridge @ {}: Start bus at {}, end bus {}", device_identifier.address(), start_bus, 0xff);
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PCI::Domain domain { s_vmd_pci_domain_number++, start_bus, 0xff };
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auto start_address = PhysicalAddress(PCI::get_BAR0(device_identifier.address())).page_base();
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return adopt_own_if_nonnull(new (nothrow) VolumeManagementDevice(domain, start_address)).release_nonnull();
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}
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void VolumeManagementDevice::write8_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u8 value)
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{
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SpinlockLocker locker(m_config_lock);
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// Note: We must write then read to ensure completion before returning.
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MemoryBackedHostBridge::write8_field(bus, device, function, field, value);
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MemoryBackedHostBridge::read8_field(bus, device, function, field);
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}
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void VolumeManagementDevice::write16_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u16 value)
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{
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SpinlockLocker locker(m_config_lock);
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// Note: We must write then read to ensure completion before returning.
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MemoryBackedHostBridge::write16_field(bus, device, function, field, value);
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MemoryBackedHostBridge::read16_field(bus, device, function, field);
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}
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void VolumeManagementDevice::write32_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u32 value)
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{
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SpinlockLocker locker(m_config_lock);
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// Note: We must write then read to ensure completion before returning.
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MemoryBackedHostBridge::write32_field(bus, device, function, field, value);
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MemoryBackedHostBridge::read32_field(bus, device, function, field);
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}
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u8 VolumeManagementDevice::read8_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
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{
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SpinlockLocker locker(m_config_lock);
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return MemoryBackedHostBridge::read8_field(bus, device, function, field);
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}
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u16 VolumeManagementDevice::read16_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
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{
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SpinlockLocker locker(m_config_lock);
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return MemoryBackedHostBridge::read16_field(bus, device, function, field);
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}
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u32 VolumeManagementDevice::read32_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
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{
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SpinlockLocker locker(m_config_lock);
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return MemoryBackedHostBridge::read32_field(bus, device, function, field);
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}
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VolumeManagementDevice::VolumeManagementDevice(PCI::Domain const& domain, PhysicalAddress start_address)
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: MemoryBackedHostBridge(domain, start_address)
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{
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}
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}
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