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https://github.com/RGBCube/serenity
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06d76a4717
The enumeration code is already enumerating all buses, recursively enumerating bridges (which are buses) makes devices on bridges being enumerated multiple times. Also, the PCI code was incorrectly mixing up terminology; let's settle down on bus, device and function because ever since PCIe came along "slots" isn't really a thing anymore.
107 lines
3.9 KiB
C++
107 lines
3.9 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <Kernel/Debug.h>
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#include <Kernel/IO.h>
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#include <Kernel/PCI/IOAccess.h>
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namespace Kernel {
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namespace PCI {
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void IOAccess::initialize()
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{
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if (!Access::is_initialized()) {
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new IOAccess();
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dbgln<PCI_DEBUG>("PCI: IO access initialised.");
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}
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}
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IOAccess::IOAccess()
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{
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klog() << "PCI: Using I/O instructions for PCI configuration space access";
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enumerate_hardware([&](const Address& address, ID id) {
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m_physical_ids.append({ address, id, get_capabilities(address) });
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});
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}
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u8 IOAccess::read8_field(Address address, u32 field)
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{
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dbgln<PCI_DEBUG>("PCI: IO Reading 8-bit field {:#08x} for {}", field, address);
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return Access::early_read8_field(address, field);
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}
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u16 IOAccess::read16_field(Address address, u32 field)
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{
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dbgln<PCI_DEBUG>("PCI: IO Reading 16-bit field {:#08x} for {}", field, address);
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return Access::early_read16_field(address, field);
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}
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u32 IOAccess::read32_field(Address address, u32 field)
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{
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dbgln<PCI_DEBUG>("PCI: IO Reading 32-bit field {:#08x} for {}", field, address);
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return Access::early_read32_field(address, field);
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}
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void IOAccess::write8_field(Address address, u32 field, u8 value)
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{
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dbgln<PCI_DEBUG>("PCI: IO Writing to 8-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out8(PCI_VALUE_PORT + (field & 3), value);
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}
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void IOAccess::write16_field(Address address, u32 field, u16 value)
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{
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dbgln<PCI_DEBUG>("PCI: IO Writing to 16-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out16(PCI_VALUE_PORT + (field & 2), value);
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}
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void IOAccess::write32_field(Address address, u32 field, u32 value)
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{
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dbgln<PCI_DEBUG>("PCI: IO Writing to 32-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out32(PCI_VALUE_PORT, value);
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}
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void IOAccess::enumerate_hardware(Function<void(Address, ID)> callback)
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{
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#if PCI_DEBUG
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dbgln("PCI: IO enumerating hardware");
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#endif
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// Single PCI host controller.
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if ((read8_field(Address(), PCI_HEADER_TYPE) & 0x80) == 0) {
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enumerate_bus(-1, 0, callback, true);
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return;
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}
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// Multiple PCI host controllers.
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for (int bus = 0; bus < 256; ++bus) {
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if (read16_field(Address(0, 0, 0, bus), PCI_VENDOR_ID) == PCI_NONE)
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break;
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enumerate_bus(-1, bus, callback, false);
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}
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}
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}
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}
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