mirror of
https://github.com/RGBCube/serenity
synced 2025-07-04 11:57:35 +00:00
2a4a19aed8
During initialization of PCI MMIO access mechanism we ensure that we have an allocation from the kernel virtual address space that cannot be taken by other components in the OS. Also, now we ensure that interrupts are disabled so mapping the region doesn't fail. In order to reduce overhead, map_device() will map the requested PCI address only if it's not mapped already. The run script has been changed so now we can boot a Q35 machine, that supports PCI ECAM. To ensure we will be able to load the machine, a PIIX3 IDE controller was added to the Q35 machine configuration in the run script. An AHCI controller was added to the i440fx machine configuration.
57 lines
No EOL
1.8 KiB
C++
57 lines
No EOL
1.8 KiB
C++
#pragma once
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#include <AK/HashMap.h>
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#include <AK/OwnPtr.h>
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#include <AK/Types.h>
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#include <Kernel/ACPI/Definitions.h>
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#include <Kernel/PCI/Access.h>
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#include <Kernel/VM/AnonymousVMObject.h>
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#include <Kernel/VM/PhysicalRegion.h>
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#include <Kernel/VM/Region.h>
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#include <Kernel/VM/VMObject.h>
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class PCI::MMIOAccess final : public PCI::Access {
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public:
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static void initialize(ACPI_RAW::MCFG&);
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virtual void enumerate_all(Function<void(Address, ID)>&) override final;
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virtual String get_access_type() override final { return "MMIO-Access"; };
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protected:
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explicit MMIOAccess(ACPI_RAW::MCFG&);
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private:
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virtual u8 read8_field(Address address, u32) override final;
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virtual u16 read16_field(Address address, u32) override final;
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virtual u32 read32_field(Address address, u32) override final;
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virtual void write8_field(Address address, u32, u8) override final;
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virtual void write16_field(Address address, u32, u16) override final;
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virtual void write32_field(Address address, u32, u32) override final;
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void map_device(Address address);
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void mmap(VirtualAddress preferred_vaddr, PhysicalAddress paddr, u32);
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void mmap_region(Region& region, PhysicalAddress paddr);
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virtual u32 get_segments_count();
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virtual u8 get_segment_start_bus(u32);
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virtual u8 get_segment_end_bus(u32);
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ACPI_RAW::MCFG& m_mcfg;
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HashMap<u16, MMIOSegment*>& m_segments;
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RefPtr<VMObject> m_mmio_window;
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OwnPtr<Region> m_mmio_window_region;
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PCI::ChangeableAddress m_mapped_address;
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};
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class PCI::MMIOSegment {
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public:
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MMIOSegment(PhysicalAddress, u8, u8);
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u8 get_start_bus();
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u8 get_end_bus();
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size_t get_size();
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PhysicalAddress get_paddr();
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private:
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PhysicalAddress m_base_addr;
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u8 m_start_bus;
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u8 m_end_bus;
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}; |