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Kernel: Oops, actually enable CR4.PGE (page table global bit)

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Turns out we were setting the wrong bit here. Now we will actually keep
kernel memory mappings in the TLB across context switches.
This commit is contained in:
Andreas Kling 2019-12-24 22:45:27 +01:00
parent caa5191f74
commit 3623e35978
1 changed files with 1 additions and 1 deletions
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2
Kernel/VM/MemoryManager.cpp
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@ -168,7 +168,7 @@ void MemoryManager::initialize_paging()
// Turn on CR4.PGE so the CPU will respect the G bit in page tables.
asm volatile(
"mov %cr4, %eax\n"
"orl $0x10, %eax\n"
"orl $0x40, %eax\n"
"mov %eax, %cr4\n");
asm volatile("movl %%eax, %%cr3" ::"a"(kernel_page_directory().cr3()));