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	NVMe: Add shadow doorbell support
Shadow doorbell feature was added in the NVMe spec to improve the performance of virtual devices. Typically, ringing a doorbell involves writing to an MMIO register in QEMU, which can be expensive as there will be a trap for the VM. Shadow doorbell mechanism was added for the VM to communicate with the OS when it needs to do an MMIO write, thereby avoiding it when it is not necessary. There is no performance improvement with this support in Serenity at the moment because of the block layer constraint of not batching multiple IOs. Once the command batching support is added to the block layer, shadow doorbell support can improve performance by avoiding many MMIO writes. Default to old MMIO mechanism if shadow doorbell is not supported.
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					 5 changed files with 121 additions and 6 deletions
				
			
		|  | @ -58,6 +58,7 @@ private: | |||
|     NVMeController(PCI::DeviceIdentifier const&, u32 hardware_relative_controller_id); | ||||
| 
 | ||||
|     ErrorOr<void> identify_and_init_namespaces(); | ||||
|     ErrorOr<void> identify_and_init_controller(); | ||||
|     Tuple<u64, u8> get_ns_features(IdentifyNamespace& identify_data_struct); | ||||
|     ErrorOr<void> create_admin_queue(QueueType queue_type); | ||||
|     ErrorOr<void> create_io_queue(u8 qid, QueueType queue_type); | ||||
|  | @ -72,6 +73,8 @@ private: | |||
|     Vector<NonnullLockRefPtr<NVMeQueue>> m_queues; | ||||
|     Vector<NonnullLockRefPtr<NVMeNameSpace>> m_namespaces; | ||||
|     Memory::TypedMapping<ControllerRegister volatile> m_controller_regs; | ||||
|     RefPtr<Memory::PhysicalPage> m_dbbuf_shadow_page; | ||||
|     RefPtr<Memory::PhysicalPage> m_dbbuf_eventidx_page; | ||||
|     bool m_admin_queue_ready { false }; | ||||
|     size_t m_device_count { 0 }; | ||||
|     AK::Duration m_ready_timeout; | ||||
|  |  | |||
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	 Pankaj Raghav
						Pankaj Raghav