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Kernel: Add MPIDR_EL1, Multiprocessor Affinity Register

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konrad 2022-12-24 01:17:44 +01:00 • committed by Andreas Kling
parent d80d7744b6
commit 91c3d7199f
1 changed files with 25 additions and 0 deletions
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25
Kernel/Arch/aarch64/Registers.h
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@ -46,6 +46,31 @@ struct alignas(u64) ID_AA64ISAR0_EL1 {
}; };
static_assert(sizeof(ID_AA64ISAR0_EL1) == 8); static_assert(sizeof(ID_AA64ISAR0_EL1) == 8);
// https://developer.arm.com/documentation/ddi0595/2021-12/AArch64-Registers/MPIDR-EL1--Multiprocessor-Affinity-Register?lang=en
// MPIDR_EL1, Multiprocessor Affinity Register
struct alignas(u64) MPIDR_EL1 {
int Aff0 : 8;
int Aff1 : 8;
int Aff2 : 8;
int MT : 1;
int : 5;
int U : 1;
int : 1;
int Aff3 : 8;
int : 24;
static inline MPIDR_EL1 read()
{
MPIDR_EL1 affinity_register;
asm("mrs %[value], MPIDR_EL1"
: [value] "=r"(affinity_register));
return affinity_register;
}
};
static_assert(sizeof(MPIDR_EL1) == 8);
// https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/ID-AA64MMFR0-EL1--AArch64-Memory-Model-Feature-Register-0 // https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/ID-AA64MMFR0-EL1--AArch64-Memory-Model-Feature-Register-0
// Memory Model Feature Register 0 // Memory Model Feature Register 0
struct alignas(u64) ID_AA64MMFR0_EL1 { struct alignas(u64) ID_AA64MMFR0_EL1 {