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Kernel: Add MPIDR_EL1, Multiprocessor Affinity Register
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@ -46,6 +46,31 @@ struct alignas(u64) ID_AA64ISAR0_EL1 {
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};
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static_assert(sizeof(ID_AA64ISAR0_EL1) == 8);
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// https://developer.arm.com/documentation/ddi0595/2021-12/AArch64-Registers/MPIDR-EL1--Multiprocessor-Affinity-Register?lang=en
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// MPIDR_EL1, Multiprocessor Affinity Register
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struct alignas(u64) MPIDR_EL1 {
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int Aff0 : 8;
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int Aff1 : 8;
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int Aff2 : 8;
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int MT : 1;
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int : 5;
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int U : 1;
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int : 1;
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int Aff3 : 8;
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int : 24;
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static inline MPIDR_EL1 read()
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{
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MPIDR_EL1 affinity_register;
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asm("mrs %[value], MPIDR_EL1"
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: [value] "=r"(affinity_register));
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return affinity_register;
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}
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};
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static_assert(sizeof(MPIDR_EL1) == 8);
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// https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/ID-AA64MMFR0-EL1--AArch64-Memory-Model-Feature-Register-0
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// Memory Model Feature Register 0
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struct alignas(u64) ID_AA64MMFR0_EL1 {
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