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https://github.com/RGBCube/serenity
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Kernel: PCI MMIO no longer uses map_for_kernel()
PCI MMIO access is done by modifying the related PhysicalPage directly, then we request to remap the region to create the mapping.
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24f2596345
commit
aca317d889
4 changed files with 19 additions and 45 deletions
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@ -94,6 +94,14 @@ public:
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{
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}
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Address(const Address& address)
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: m_seg(address.seg())
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, m_bus(address.bus())
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, m_slot(address.slot())
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, m_function(address.function())
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{
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}
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bool is_null() const { return !m_bus && !m_slot && !m_function; }
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operator bool() const { return !is_null(); }
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@ -33,7 +33,7 @@ public:
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virtual void enumerate_all(Function<void(Address, ID)>&) override final;
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virtual String get_access_type() override final { return "IO-Access"; };
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virtual uint32_t get_segments_count() { return 1; };
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protected:
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IOAccess();
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@ -44,8 +44,7 @@ private:
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virtual void write8_field(Address address, u32, u8) override final;
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virtual void write16_field(Address address, u32, u16) override final;
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virtual void write32_field(Address address, u32, u32) override final;
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virtual uint32_t get_segments_count() { return 1; };
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virtual uint8_t get_segment_start_bus(u32) { return 0x0; };
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virtual uint8_t get_segment_end_bus(u32) { return 0xFF; };
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};
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@ -58,25 +58,23 @@ PCI::MMIOAccess::MMIOAccess(ACPI_RAW::MCFG& raw_mcfg)
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, m_mapped_address(ChangeableAddress(0xFFFF, 0xFF, 0xFF, 0xFF))
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{
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kprintf("PCI: Using MMIO Mechanism for PCI Configuartion Space Access\n");
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m_mmio_window = *AnonymousVMObject::create_with_size(PAGE_ROUND_UP(PCI_MMIO_CONFIG_SPACE_SIZE));
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m_mmio_window_region = MM.allocate_kernel_region_with_vmobject(*m_mmio_window, m_mmio_window->size(), "PCI MMIO", Region::Access::Read | Region::Access::Write);
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m_mmio_window_region = MM.allocate_kernel_region(PAGE_ROUND_UP(PCI_MMIO_CONFIG_SPACE_SIZE), "PCI MMIO", Region::Access::Read | Region::Access::Write);
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auto checkup_region = MM.allocate_kernel_region((PAGE_SIZE * 2), "PCI MCFG Checkup", Region::Access::Read | Region::Access::Write);
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auto checkup_region = MM.allocate_kernel_region(PhysicalAddress(page_base_of((u32)&raw_mcfg)),(PAGE_SIZE * 2), "PCI MCFG Checkup", Region::Access::Read | Region::Access::Write);
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#ifdef PCI_DEBUG
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dbgprintf("PCI: Checking MCFG Table length to choose the correct mapping size\n");
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#endif
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mmap_region(*checkup_region, PhysicalAddress((u32)&raw_mcfg & 0xfffff000));
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ACPI_RAW::SDTHeader* sdt = (ACPI_RAW::SDTHeader*)(checkup_region->vaddr().get() + ((u32)&raw_mcfg & 0xfff));
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ACPI_RAW::SDTHeader* sdt = (ACPI_RAW::SDTHeader*)checkup_region->vaddr().offset(offset_in_page((u32)&raw_mcfg)).as_ptr();
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u32 length = sdt->length;
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u8 revision = sdt->revision;
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kprintf("PCI: MCFG, length - %u, revision %d\n", length, revision);
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checkup_region->unmap();
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auto mcfg_region = MM.allocate_kernel_region(PAGE_ROUND_UP(length) + PAGE_SIZE, "PCI Parsing MCFG", Region::Access::Read | Region::Access::Write);
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mmap_region(*mcfg_region, PhysicalAddress((u32)&raw_mcfg & 0xfffff000));
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auto mcfg_region = MM.allocate_kernel_region(PhysicalAddress(page_base_of((u32)&raw_mcfg)), PAGE_ROUND_UP(length) + PAGE_SIZE, "PCI Parsing MCFG", Region::Access::Read | Region::Access::Write);
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ACPI_RAW::MCFG& mcfg = *((ACPI_RAW::MCFG*)(mcfg_region->vaddr().get() + ((u32)&raw_mcfg & 0xfff)));
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auto& mcfg = *(ACPI_RAW::MCFG*)mcfg_region->vaddr().offset(offset_in_page((u32)&raw_mcfg)).as_ptr();
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#ifdef PCI_DEBUG
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dbgprintf("PCI: Checking MCFG @ V 0x%x, P 0x%x\n", &mcfg, &raw_mcfg);
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#endif
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@ -116,7 +114,8 @@ void PCI::MMIOAccess::map_device(Address address)
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#ifdef PCI_DEBUG
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dbgprintf("PCI: Mapping device @ pci (%w:%b:%b.%b), V 0x%x, P 0x%x\n", address.seg(), address.bus(), address.slot(), address.function(), m_mmio_window_region->vaddr().get(), device_physical_mmio_space.get());
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#endif
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MM.map_for_kernel(m_mmio_window_region->vaddr(), device_physical_mmio_space);
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m_mmio_window_region->vmobject().physical_pages()[0] = PhysicalPage::create(device_physical_mmio_space,false,false);
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m_mmio_window_region->remap();
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m_mapped_address = address;
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}
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@ -205,33 +204,6 @@ void PCI::MMIOAccess::enumerate_all(Function<void(Address, ID)>& callback)
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}
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}
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void PCI::MMIOAccess::mmap(VirtualAddress vaddr, PhysicalAddress paddr, u32 length)
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{
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unsigned i = 0;
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while (length >= PAGE_SIZE) {
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MM.map_for_kernel(VirtualAddress(vaddr.offset(i * PAGE_SIZE).get()), PhysicalAddress(paddr.offset(i * PAGE_SIZE).get()));
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#ifdef PCI_DEBUG
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dbgprintf("PCI: map - V 0x%x -> P 0x%x\n", vaddr.offset(i * PAGE_SIZE).get(), paddr.offset(i * PAGE_SIZE).get());
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#endif
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length -= PAGE_SIZE;
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i++;
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}
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if (length > 0) {
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MM.map_for_kernel(vaddr.offset(i * PAGE_SIZE), paddr.offset(i * PAGE_SIZE), true);
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}
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#ifdef PCI_DEBUG
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dbgprintf("PCI: Finished mapping\n");
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#endif
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}
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void PCI::MMIOAccess::mmap_region(Region& region, PhysicalAddress paddr)
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{
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#ifdef PCI_DEBUG
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dbgprintf("PCI: Mapping region, size - %u\n", region.size());
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#endif
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mmap(region.vaddr(), paddr, region.size());
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}
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PCI::MMIOSegment::MMIOSegment(PhysicalAddress segment_base_addr, u8 start_bus, u8 end_bus)
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: m_base_addr(segment_base_addr)
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, m_start_bus(start_bus)
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@ -41,7 +41,7 @@ public:
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virtual void enumerate_all(Function<void(Address, ID)>&) override final;
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virtual String get_access_type() override final { return "MMIO-Access"; };
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virtual u32 get_segments_count();
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protected:
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explicit MMIOAccess(ACPI_RAW::MCFG&);
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@ -54,16 +54,11 @@ private:
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virtual void write32_field(Address address, u32, u32) override final;
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void map_device(Address address);
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void mmap(VirtualAddress preferred_vaddr, PhysicalAddress paddr, u32);
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void mmap_region(Region& region, PhysicalAddress paddr);
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virtual u32 get_segments_count();
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virtual u8 get_segment_start_bus(u32);
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virtual u8 get_segment_end_bus(u32);
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ACPI_RAW::MCFG& m_mcfg;
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HashMap<u16, MMIOSegment*>& m_segments;
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RefPtr<VMObject> m_mmio_window;
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OwnPtr<Region> m_mmio_window_region;
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PCI::ChangeableAddress m_mapped_address;
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};
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