mirror of
https://github.com/RGBCube/serenity
synced 2025-07-27 06:47:35 +00:00
Kernel/riscv64: Implement RISC-V SmapDisabler
This commit is contained in:
parent
cb1b0c4101
commit
b6ac2ed34d
1 changed files with 23 additions and 0 deletions
23
Kernel/Arch/riscv64/SmapDisabler.cpp
Normal file
23
Kernel/Arch/riscv64/SmapDisabler.cpp
Normal file
|
@ -0,0 +1,23 @@
|
|||
/*
|
||||
* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <Kernel/Arch/SmapDisabler.h>
|
||||
#include <Kernel/Arch/riscv64/CSR.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
SmapDisabler::SmapDisabler()
|
||||
: m_flags(RISCV64::CSR::read_and_set_bits(RISCV64::CSR::Address::SSTATUS, 1 << to_underlying(RISCV64::CSR::SSTATUS::Offset::SUM)))
|
||||
{
|
||||
}
|
||||
|
||||
SmapDisabler::~SmapDisabler()
|
||||
{
|
||||
if ((m_flags & (1 << to_underlying(RISCV64::CSR::SSTATUS::Offset::SUM))) == 0)
|
||||
RISCV64::CSR::clear_bits(RISCV64::CSR::Address::SSTATUS, 1 << to_underlying(RISCV64::CSR::SSTATUS::Offset::SUM));
|
||||
}
|
||||
|
||||
}
|
Loading…
Add table
Add a link
Reference in a new issue