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Kernel/aarch64: Handle SVC exception by calling syscall_handler

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The SVC (supervisor call) instruction is used in userland to do
syscalls, and this commit adds the handling of syscalls to
Interrupts.cpp.
This commit is contained in:
Timon Kruiper 2023-01-30 15:42:39 +01:00 • committed by Jelle Raaijmakers
parent 4b0f8e9a20
commit d5262a540c
2 changed files with 9 additions and 0 deletions
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4
Kernel/Arch/aarch64/Interrupts.cpp
View file

@ -18,6 +18,8 @@
namespace Kernel { namespace Kernel {
extern "C" void syscall_handler(TrapFrame const*);
static void dump_exception_syndrome_register(Aarch64::ESR_EL1 const& esr_el1) static void dump_exception_syndrome_register(Aarch64::ESR_EL1 const& esr_el1)
{ {
dbgln("Exception Syndrome: EC({:#b}) IL({:#b}) ISS({:#b}) ISS2({:#b})", esr_el1.EC, esr_el1.IL, esr_el1.ISS, esr_el1.ISS2); dbgln("Exception Syndrome: EC({:#b}) IL({:#b}) ISS({:#b}) ISS2({:#b})", esr_el1.EC, esr_el1.IL, esr_el1.ISS, esr_el1.ISS2);
@ -87,6 +89,8 @@ extern "C" void exception_common(Kernel::TrapFrame* trap_frame)
if (Aarch64::exception_class_is_data_abort(esr_el1.EC) || Aarch64::exception_class_is_instruction_abort(esr_el1.EC)) { if (Aarch64::exception_class_is_data_abort(esr_el1.EC) || Aarch64::exception_class_is_instruction_abort(esr_el1.EC)) {
auto page_fault = page_fault_from_exception_syndrome_register(VirtualAddress(fault_address), esr_el1); auto page_fault = page_fault_from_exception_syndrome_register(VirtualAddress(fault_address), esr_el1);
page_fault.handle(*trap_frame->regs); page_fault.handle(*trap_frame->regs);
} else if (Aarch64::exception_class_is_svc_instruction_execution(esr_el1.EC)) {
syscall_handler(trap_frame);
} else { } else {
dump_registers(*trap_frame->regs); dump_registers(*trap_frame->regs);
PANIC("Unexpected exception!"); PANIC("Unexpected exception!");

5
Kernel/Arch/aarch64/Registers.h
View file

@ -1172,6 +1172,11 @@ static inline bool exception_class_is_data_or_instruction_abort_from_lower_excep
return exception_class == 0x20 || exception_class == 0x24; return exception_class == 0x20 || exception_class == 0x24;
} }
static inline bool exception_class_is_svc_instruction_execution(u8 exception_class)
{
return exception_class == 0x11 || exception_class == 0x15;
}
// D17.2.37 ESR_EL1, Exception Syndrome Register (EL1) // D17.2.37 ESR_EL1, Exception Syndrome Register (EL1)
// ISS encoding for an exception from a Data Abort // ISS encoding for an exception from a Data Abort
// DFSC, bits [5:0] // DFSC, bits [5:0]